Revisiting Coreboot

Hello Coreboot community,

After a rather long hiatus (my last commits to LinuxBIOS were in
2005) - my work had moved me to PPC/MIPS and now mainly ARM
architectures, so have been using u-boot for many years.

The company I work for has a large range of embedded devices, for
which we use a common platform for ARM devices, and we have
completed a major re-work on this platform to ensure RED and CRA
compliance. I have been tasked with migrating a range of
industrial embedded x86 devices to our common platform, to prepare
these products for CRA compliance. There are many thousands of
these x86 devices in the field, using either Q7 or COM-Express
modules with various generations (Bay Trail, Apollo Lake and
Elkhart Lake) of Intel processors.

My 2 concerns are boot speed and BIOS updates. Devices with Bay
Trail and Apollo Lake SoC's have customised BIOS's and it appears
as though the BIOS vendor simply forked their BIOS code in 2015
and no security updates have been made at all - even though they
have made modifications to these BIOS's as recently as November
2025. Of course attempting to find real information about this is
impossible.

I have been looking through the Coreboot documentation in a lot
of detail in preparation, but would like to ask for some friendly
advice about de-bricking these devices when I start trying to
flash coreboot into them! All of these modules have SO-8 SPI flash
devices on them, and I assume a good SPI flash programmer would be
useful, I also guess for development that an SPI flash emulator
could be very useful. Could anyone provide me recommendations for
decent devices for this purpose?

Hamish

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