Request for Guidance on Coreboot Porting for Raptor Lake-S RVP + DDR5 Motherboard
"Keshavamurthy K [Firmware-NTL] via coreboot" <[email protected]> Mon, 15 Jun 2026 10:51:28 +0000
| Newsgroups | gmane.linux.bios |
|---|---|
| Message-ID | <PN2P287MB0416A41091B3316612AF52118EE62@PN2P287MB0416.INDP287.PROD.OUTLOOK.COM> |
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Dear Coreboot Community,
I am currently developing a custom motherboard based on Intel Raptor Lake-S=
processors and the Intel chipset with DDR5 memory support. I would like to=
port Coreboot to this platform and am seeking guidance from the community =
regarding board bring-up and firmware development.
My understanding is that Raptor Lake support in Coreboot is based on the Al=
der Lake platform architecture and Intel FSP integration. I would appreciat=
e any recommendations on the best existing mainboards or reference implemen=
tations that can be used as a starting point for a custom Raptor Lake-S + =
DDR5 design.
I am particularly looking for guidance on the following topics:
* Intel FSP requirements and integration for Raptor Lake-S.
* DDR5 memory initialization and training.
* H610 chipset configuration and board enablement.
* GPIO and pad configuration setup.
* Intel ME firmware requirements.
* Boot Guard considerations during development.
* PCIe, SATA, USB, and onboard peripheral initialization.
* Early boot debugging methods (UART, POST codes, external SPI flashing=
, etc.).
* Recommended development workflow for a new custom mainboard port.
Our goal is to bring up Coreboot on a custom Raptor Lake-S + DDR5 motherboa=
rd intended for a custom computing platform. We are currently setting up th=
e build environment and reviewing existing Alder Lake and Raptor Lake imple=
mentations within the Coreboot source tree.
Thank you for your time and support. Any documentation, examples, or recomm=
endations would be extremely helpful.
Thanks & Regards,
Keshavamurthy K
Note : " We Never inform change of Bank details by email. If you receive an=
y such emails from our domain/users. Please don't respond, and contact us s=
eparately "
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xt-indent: 0px; background-color: rgb(255, 255, 255); margin: 1em 0px; font=
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, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
Dear Coreboot Community,</div>
<div class=3D"elementToProof" style=3D"direction: ltr; text-align: left; te=
xt-indent: 0px; background-color: rgb(255, 255, 255); margin: 1em 0px; font=
-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica=
, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
I am currently developing a custom motherboard based on Intel Raptor Lake-S=
processors and the Intel chipset with DDR5 memory support. I would like to=
port Coreboot to this platform and am seeking guidance from the community =
regarding board bring-up and firmware
development.</div>
<div class=3D"elementToProof" style=3D"direction: ltr; text-align: left; te=
xt-indent: 0px; background-color: rgb(255, 255, 255); margin: 1em 0px; font=
-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica=
, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
My understanding is that Raptor Lake support in Coreboot is based on the Al=
der Lake platform architecture and Intel FSP integration. I would appreciat=
e any recommendations on the best existing mainboards or reference implemen=
tations that can be used as a starting
point for a custom Raptor Lake-S + DDR5 design.</div>
<div class=3D"elementToProof" style=3D"direction: ltr; text-align: left; te=
xt-indent: 0px; background-color: rgb(255, 255, 255); margin: 1em 0px; font=
-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica=
, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
I am particularly looking for guidance on the following topics:</div>
<ul data-spread=3D"false" style=3D"direction: ltr; text-align: left; backgr=
ound-color: rgb(255, 255, 255);">
<li style=3D"font-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, C=
alibri, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0); direct=
ion: ltr;">
Intel FSP requirements and integration for Raptor Lake-S.</li><li style=3D"=
font-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helve=
tica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0); direction: ltr;">
DDR5 memory initialization and training.</li><li style=3D"font-family: Apto=
s, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-serif;=
font-size: 12pt; color: rgb(0, 0, 0); direction: ltr;">
H610 chipset configuration and board enablement.</li><li style=3D"font-fami=
ly: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, san=
s-serif; font-size: 12pt; color: rgb(0, 0, 0); direction: ltr;">
GPIO and pad configuration setup.</li><li style=3D"font-family: Aptos, Apto=
s_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-serif; font-s=
ize: 12pt; color: rgb(0, 0, 0); direction: ltr;">
Intel ME firmware requirements.</li><li style=3D"font-family: Aptos, Aptos_=
EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-serif; font-siz=
e: 12pt; color: rgb(0, 0, 0); direction: ltr;">
Boot Guard considerations during development.</li><li style=3D"font-family:=
Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-s=
erif; font-size: 12pt; color: rgb(0, 0, 0); direction: ltr;">
PCIe, SATA, USB, and onboard peripheral initialization.</li><li style=3D"fo=
nt-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helveti=
ca, sans-serif; font-size: 12pt; color: rgb(0, 0, 0); direction: ltr;">
Early boot debugging methods (UART, POST codes, external SPI flashing, etc.=
).</li><li style=3D"font-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontSer=
vice, Calibri, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);=
direction: ltr;">
Recommended development workflow for a new custom mainboard port.</li></ul>
<div class=3D"elementToProof" style=3D"direction: ltr; text-align: left; te=
xt-indent: 0px; background-color: rgb(255, 255, 255); margin: 1em 0px; font=
-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica=
, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
Our goal is to bring up Coreboot on a custom Raptor Lake-S + DDR5 motherboa=
rd intended for a custom computing platform. We are currently setting up th=
e build environment and reviewing existing Alder Lake and Raptor Lake imple=
mentations within the Coreboot source
tree.</div>
<div class=3D"elementToProof" style=3D"direction: ltr; text-align: left; te=
xt-indent: 0px; background-color: rgb(255, 255, 255); margin: 1em 0px; font=
-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica=
, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
Thank you for your time and support. Any documentation, examples, or recomm=
endations would be extremely helpful.</div>
<div class=3D"elementToProof" style=3D"direction: ltr; font-family: Aptos, =
Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-serif; fo=
nt-size: 12pt; color: rgb(0, 0, 0);">
<br>
</div>
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ly: Aptos, sans-serif; font-size: 12pt;">
<span style=3D"font-size: 11pt; color: black;">Thanks & Regards,</span>=
</p>
<p class=3D"elementToProof" style=3D"direction: ltr; margin: 0cm; font-fami=
ly: Aptos, sans-serif; font-size: 12pt;">
<span style=3D"color: rgb(0, 0, 0);">Keshavamurthy K </span></p>
</div>
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nt, Aptos_MSFontService, Calibri, Helvetica, sans-serif; font-size: 12pt; c=
olor: rgb(0, 0, 0);">
<br>
</div>
Note : " We Never inform change of Bank details by email. If you recei=
ve any such emails from our domain/users. Please don’t respond, and c=
ontact us separately "
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