[Git][xorg-team/lib/mesa][debian-experimental] 47 commits: .pick_status.json: Update to 806fcc6193e305c22366baa17ccf88c8e1da1bda

"Timo Aaltonen (@tjaalton)" <[email protected]>
Newsgroups gmane.linux.debian.devel.x
Message-ID <[email protected]>

Timo Aaltonen pushed to branch debian-experimental at X Strike Force / lib / mesa


Commits:
ddb44422 by Eric Engestrom at 2026-04-22T14:34:48+02:00
.pick_status.json: Update to 806fcc6193e305c22366baa17ccf88c8e1da1bda

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
76f4e207 by Karol Herbst at 2026-04-22T14:34:48+02:00
nak: the MS location comes last in TLD, same spot as depth compare in TEX

Some Max Payne 3 shaders are impacted by this and probably will fix some
issue there. The VK CTS isn't testing this, but it was verified to fix a
real problem by inserting 0 offsets into the instruction and having CTS
tests fail with the old ordering.

Totals from 3 (0.00% of 1163204) affected shaders:
CodeSize: 2496 -> 2736 (+9.62%)
Static cycle count: 732 -> 741 (+1.23%)

Fixes: ad01fbdda03 ("nak: Add a NIR texture lowering pass")
Reviewed-by: Mel Henning <[email protected]>
(cherry picked from commit e09045e26cde23a3dc37dd5a70855257f066989c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
c15245f8 by Connor Abbott at 2026-04-22T14:34:48+02:00
ir3: Don't reset immediate count to 0 after lowering

We need to know the immediate count even after lowering, to compute the
overall const size. Previously we were using the capacity field, but
that's unreliable and won't be available once we switch to a real
dynamic array container instead of (poorly) reinventing one.

Fixes: 86f3c0c4c2c ("ir3: simplify constlen calculation")
(cherry picked from commit 280c64d720299c2b53aa53a34cfbca7178b463d3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
eb7c92b6 by Connor Abbott at 2026-04-22T14:34:48+02:00
ir3: Use correct immediate size for constlen calculation

"size" is the allocated size of the array, not the number of immediates
actually used. We could wind up returning a too-large constlen, larger
than 512, and since the binning variant uses the non-binning variant's
constlen as it's max_const we could make binning variants use c512.x and
crash when encoding.

Fixes: 86f3c0c4c2c ("ir3: simplify constlen calculation")
(cherry picked from commit 49d29d4f109fafb2ecacb3d5ec61faec45dacfc1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
010072b5 by Samuel Pitoiset at 2026-04-22T14:34:48+02:00
vulkan: add an option to lower SHADER_RECORD_INDEX to non-uniform

Applications are required to set NonUniform if the resource is arrayed,
but with VK_DESCRIPTOR_MAPPING_SOURCE_HEAP_WITH_SHADER_RECORD_INDEX_EXT,
the resource is non-arrayed in the shader. So, it's technically not
required to set it. Although, the offset can vary per-lane and
NonUniform is implicit.

Backport-to: 26.1
Signed-off-by: Samuel Pitoiset <[email protected]>
(cherry picked from commit 8e2869fa4114622a0f63c439c2dec110ed231c97)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
3740d70f by Samuel Pitoiset at 2026-04-22T14:34:48+02:00
radv: lower SHADER_RECORD_INDEX to non-uniform

This fixes an issue with RADV and NVIDIA-RTX/Donut-Samples with heap
support in vkd3d-proton.

Backport-to: 26.1
Signed-off-by: Samuel Pitoiset <[email protected]>
(cherry picked from commit 477c44ba93986e9aa4feae20f7e3777586a50ed1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
705dabbc by Michel Dänzer at 2026-04-22T14:34:48+02:00
winsys/amdgpu: Use render node only as fallback

If ac_drm_device_initialize returns -EACCES for the fd passed in.

A render node file description can't have DRM master status, which means
AMDGPU_CTX_PRIORITY_HIGH can't work without CAP_SYS_NICE (which
generally only the root user has).

Fixes: 8f30e90fc104 ("winsys/amdgpu: Prefer render node FD for ac_drm_device_initialize")
(cherry picked from commit 5cc3264b532f3ed7718f4b340b3d0f623cac4f8a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
0d6e04de by Erik Faye-Lund at 2026-04-22T14:34:48+02:00
panvk: drop out-of-date TODO

We already did this, so let's drop this TODO.

Fixes: d36e6af3290 ("panvk: Bump the max image size on v11+")
Reviewed-by: Boris Brezillon <[email protected]>
(cherry picked from commit f13720710885c70201998c8dc31daab7d6dce1a3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
c63da336 by Zan Dobersek at 2026-04-22T14:34:48+02:00
tu: only support userspace-managed perfcounters on a7xx and earlier

Future kernel API for perfcounter management will likely be required for
a8xx and onwards. For a7xx and earlier, cmdstream-based selector and
counter register management is still supported.

Cc: mesa-stable
Signed-off-by: Zan Dobersek <[email protected]>
(cherry picked from commit c2708afbc7e91da54183c72d5e8c89a452356073)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
920a8480 by Dhruv Mark Collins at 2026-04-22T14:34:48+02:00
tu/autotune: Fail gracefully when CP counters are unavailable

When preemption optimization is supported then the necessary CP
counters being missing causes a device initialization error which
is unnecessary as support can simply be disabled instead to allow
for a more graceful fail. This also fixes A8XX which doesn't have
performance counters hooked up yet.

Cc: mesa-stable
Signed-off-by: Dhruv Mark Collins <[email protected]>
Assisted-by: OpenAI Codex (GPT-5.4)
(cherry picked from commit a5ec9b7892bd45e028cbf302eeced65864d6da22)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
3d6fab04 by Dhruv Mark Collins at 2026-04-22T14:34:48+02:00
fd/pps: Allocate performance counters from high-to-low

The UMD will be switching to allocating counters from low-to-high,
so to avoid the chances of conflict with this new policy the PPS
driver now allocates the other way around. Additionally, this will
future proof it for the MSM-DRM uAPI for performance counters which
will similarly allocate from high-to-low.

Cc: mesa-stable
Signed-off-by: Dhruv Mark Collins <[email protected]>
Assisted-by: OpenAI Codex (GPT-5.4)
(cherry picked from commit 24849eef9f55a072eca342a48ff46471e3b89422)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
203ae350 by Dhruv Mark Collins at 2026-04-22T14:34:48+02:00
tu/autotune: Allocate performance counters from low-to-high

This is more consistent with the newly established pattern of the
UMD allocating all locally used performance counters low-to-high
instead of the prior high-to-low order.

Cc: mesa-stable
Signed-off-by: Dhruv Mark Collins <[email protected]>
Assisted-by: OpenAI Codex (GPT-5.4)
(cherry picked from commit f78541b765e42125b846bb936ead4439ff5fe915)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
b8e9e83b by Dhruv Mark Collins at 2026-04-22T14:34:49+02:00
tu/query_pool: Avoid CP counter conflict with autotune

With autotune allocating counters low-to-high, the conflict with
PERFORMANCE_QUERY_KHR will happen if any CP-based counters are
used. This is a temporary workaround which just drops the first
two CP counters from being usable for performance queries.

Cc: mesa-stable
Signed-off-by: Dhruv Mark Collins <[email protected]>
Assisted-by: OpenAI Codex (GPT-5.4)
(cherry picked from commit 78e2bbc70f55f1cf6ef922e2052b1ce6b879b952)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
250aaa9f by Mauro Rossi at 2026-04-22T14:34:49+02:00
radv: Fix gnu-empty-initializer errors in 480a94fb

Fixes the following building errors:

../src/amd/vulkan/radv_shader.c:3460:42: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct radv_shader_debug_info debug = {};
                                         ^
1 error generated.

../src/amd/vulkan/radv_shader_args.c:975:43: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct user_sgpr_info user_sgpr_info = {};
                                          ^
1 error generated.

Fixes: 480a94fb ("radv: Gather debug info about shader args")
(cherry picked from commit 46d396d9d8b57a12cc436a0dacc8671173097b1f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
a0521762 by Mauro Rossi at 2026-04-22T14:34:49+02:00
radv: Fix gnu-empty-initializer errors in 8c10eab1

Fixes the following building errors:

../src/amd/vulkan/radv_rra.c:1369:43: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
      struct radv_bvh_stats_gfx12 stats = {};
                                          ^
../src/amd/vulkan/radv_rra.c:1376:45: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
      struct radv_bvh_stats_gfx10_3 stats = {};
                                            ^
2 errors generated.

Fixes: 8c10eab1 ("radv: Add an option for dumping BVH stats")
(cherry picked from commit dfca417db88dcb54fbcef0492136c593ed6fafb5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
b0d10585 by Ryan Zhang at 2026-04-22T14:34:49+02:00
panvk: add VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL to host copy layouts

Add the missing layout which do not need implemented anything in
mali gpu.

Fixed: dEQP-VK.image.host_image_copy.properties.properties
unifiedImageLayouts feature is supported, but layout
VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL was not included in
VkPhysicalDeviceHostImageCopyProperties::pCopySrcLayouts.

Fixes: 1cd61ee ("panvk: implement VK_EXT_host_image_copy for linear color images")

Signed-off-by: Ryan Zhang <[email protected]>
Reviewed-by: Erik Faye-Lund <[email protected]>
(cherry picked from commit 62e71203842d800e07e4d26edb52f088ff5c67ec)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
641f319a by Matt Turner at 2026-04-22T14:34:49+02:00
intel/elk: Remove dead TXL_LZ/TXF_LZ opcodes

These opcodes were only emitted for Gen9+ hardware, but elk only targets
Gen8 and below.

Fixes: 05d78994a76 ("intel/elk: Remove Gfx9+ sampler messages and modes")
(cherry picked from commit d36a578bc028ef43ca460e529bb59ef8a3c286a3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
7241b3e0 by Karol Herbst at 2026-04-22T14:34:49+02:00
mesa/st: do not advertise CL subgroup features on the GL side

Fixes: 2a5227981e3 ("gallium: add SUBGROUP_FEATURE bits for rotate and rotate_clustered")

Reviewed-by: Marek Olšák <[email protected]>
(cherry picked from commit 9fb54a209276157f291c212eb5f944483952ef86)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
e2b2d511 by Janne Grunau at 2026-04-22T14:34:49+02:00
nir/gather_info: clear interpolation qualifiers only in fragment stage

Asahi wants the the interpolation qualifiers from the shader info in the
vertex shader. Clear them only in the fragment stage so they can
propagate back.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15288
Backport-to: 26.0
Fixes: a72704d0fbd ("nir/gather_info: clear interpolation qualifiers before gathering")
Signed-off-by: Janne Grunau <[email protected]>
(cherry picked from commit 98a97cb4136751080979a4ae2dacc69869099b75)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
be33c1c0 by Tapani Pälli at 2026-04-22T14:34:49+02:00
intel/compiler: implement macl part of Wa_18035690555

Fixes: 3ab9145393f ("intel/compiler: implement dummy mov for Wa_18035690555")
Signed-off-by: Tapani Pälli <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
(cherry picked from commit 8736d1a9a6b323fc2c6c1bdb5d6a445f1cef1575)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
0beccdd9 by David Rosca at 2026-04-22T14:34:49+02:00
d3d12: Use HEVC RefPicSet order from frontend

It is correctly sorted in frontend since 779edc07598 ("frontends/va: Correctly derive HEVC StCurrBefore, StCurrAfter and LtCurr")

This fixes RefPicSetLtCurr order which was incorrectly sorted here.

Cc: mesa-stable
(cherry picked from commit 7a8721e95c7b4be48526b9978b199b24167ec3f0)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
771d342a by Icenowy Zheng at 2026-04-22T14:34:49+02:00
pvr: follow other drivers' practice for copying build ID

Previously the output length of pvr_get_driver_build_sha() is changed to
BUILD_ID_EXPECTED_HASH_LENGTH, but the array defined to receive its
output, the driver_build_sha array inside struct pvr_instance, is
declared with BLAKE3_KEY_LEN, which is longer than
BUILD_ID_EXPECTED_HASH_LENGTH.

This leads to uninitialized memory being accessed when creating
pipelineCacheUUID value, and the pipelineCacheUUID value would become
random in each run, defecting the purpose of it.

Refactor the code copying the build ID to follow other drivers: changing
the parameter from the buffer to the instance pointer, inserting a
static assert thanks to being able to retrieve the destination buffer
length (as an array inside the instance structure) and using
copy_build_id_to_sha1() to do the final copy.

Fixes: 6a42493c94b6 ("pvr: Use BUILD_ID_EXPECTED_HASH_LENGTH")
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Ella Stanforth <[email protected]>
(cherry picked from commit 9870c8d8c4bfff16f2c60f378742d144242f08e6)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
4c941da3 by Patrick Lerda at 2026-04-22T14:34:49+02:00
r600: fix alpha-to-coverage and alpha-to-one used together

This change is inspired by b56f47611a57 ("radeonsi: fix
alpha-to-coverage + alpha-to-one used together for
gfx6-10.3") and implements the same algorithm.

This change was tested on rv770, palm and cayman. Here are the tests fixed:
spec/arb_framebuffer_object/execution/msaa-alpha-to-coverage_alpha-to-one: fail pass
spec/arb_framebuffer_object/execution/msaa-alpha-to-coverage_alpha-to-one_write-z: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <[email protected]>
(cherry picked from commit 7513f48edf103e696289c1583ae357c3ac81dcc7)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
d974ef12 by Patrick Lerda at 2026-04-22T14:34:49+02:00
r600: fix atomic buffer offset

The atomic offset implementation was incomplete.

This change was tested on cayman, it fixes all the
variants of this test:
khr-gl4[2-6]/shader_atomic_counters/advanced-usage-multi-stage: fail pass
khr-gles31/core/shader_atomic_counters/advanced-usage-multi-stage: fail pass

Fixes: 06993e4ee350 ("r600: add support for hw atomic counters. (v3)")
Signed-off-by: Patrick Lerda <[email protected]>
(cherry picked from commit 48902771ad795dc310dddf7e36b4ff9ebb16bb9b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
6f2b7828 by Patrick Lerda at 2026-04-22T14:34:49+02:00
r600: update vertex emit_varying_pos

This change adds a minimal support for gl_PointSize to
be used alongside gl_ClipDistance/gl_CullDistance.

This change was tested on palm and cayman. Here is the test fixed:
khr-gl4[5-6]/gl_spirv/spirv_validation_builtin_variable_decorations_test: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <[email protected]>
(cherry picked from commit 032a2bdc1ee963f68ef642a16b30b0eb50fe1573)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
d1fb12d8 by Patrick Lerda at 2026-04-22T14:34:49+02:00
r600: fix atomic_counter_post_dec

This change was tested on plam and cayman. Here are the tests fixed:
spec/arb_gl_spirv/execution/uniform/atomic-uint-aoa-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-aoa-fs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-array-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-array-fs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-fs: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <[email protected]>
(cherry picked from commit 0deac18581e80926b5cedf49848b74e90bb57db3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
fcf6c68f by Erik Faye-Lund at 2026-04-22T14:34:49+02:00
pan/lib: fix up afbc and linear layout

A few cases of UINT32_MAX were missed, whoops.

Fixes: c2c91e78fdc ("pan/layout: Allow bigger size/surface stride on v12+")
Reviewed-by: Boris Brezillon <[email protected]>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <[email protected]>
(cherry picked from commit 69b8372fbf98da6e81ba6b22a13e160ea6784928)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
9e6b384b by Erik Faye-Lund at 2026-04-22T14:34:49+02:00
pan/lib: emit high bits of buffer-size

We can't expose large texel-buffers if we don't emit the high bits.
Whoopsie!

Fixes: 4db7958edc4 ("pan/bi: Change texel buffer limits")
Reviewed-by: Boris Brezillon <[email protected]>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <[email protected]>
(cherry picked from commit 57a80ff78cc3f5532ba01e6a1e194544bf207e75)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
86593a51 by Erik Faye-Lund at 2026-04-22T14:34:49+02:00
nouveau: do not report unsupported feature

This hasn't been supported since the TGSI envvar was ripped out. When
converted to NIR, we don't see these instructions at all.

Fixes: c3cbe610dfd ("nouveau: Delete the NV50_PROG_USE_TGSI env var.")
Reviewed-by: Marek Olšák <[email protected]>
(cherry picked from commit b062062430b0ee0c560e46e28f5c1da7555f5591)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
bf1c7cd4 by Erik Faye-Lund at 2026-04-22T14:34:49+02:00
radeonsi: remove old, unsupported cap

This hasn't been supported for a long time.

Fixes: 420fe1e7f9e ("radeonsi: remove TGSI")
Reviewed-by: Marek Olšák <[email protected]>
(cherry picked from commit 261cb0e9bf996432457b2b8919488e64d4eef233)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
4b5a101e by Erik Faye-Lund at 2026-04-22T14:34:49+02:00
panvk: do not enable extension without required feature

The Vulkan spec states that if VK_ARM_shader_core_builtins is supported,
shaderCoreBuiltins is a required feature. So let's not enable that
extension unless we can...

Fixes: dff1d91c64e ("panvk: Enable VK_ARM_shader_core_builtins")
Reviewed-by: Daniel Stone <[email protected]>
(cherry picked from commit 8cb89853b8f9993febb848ac83c5f6cf85aec11a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
8c7afcf8 by Erik Faye-Lund at 2026-04-22T14:34:49+02:00
panvk: do not enable extension without required feature

The Vulkan spec states that if VK_KHR_shader_clock is supported,
shaderSubgroupClock is a required feature. So let's not enable that
extension unless we can...

Fixes: e9c2c324094 ("panvk: enable VK_KHR_shader_clock")
Reviewed-by: Christoph Pillmayer <[email protected]>
Reviewed-by: Ashley Smith <[email protected]>
Reviewed-by: Daniel Stone <[email protected]>
(cherry picked from commit c8ae72f51d5bdea0472b059d382769c3421a066a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
006ee6ea by Lionel Landwerlin at 2026-04-22T14:34:49+02:00
anv: avoid C23

For some reason the android builders started noticing...

Signed-off-by: Lionel Landwerlin <[email protected]>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit f6306198d08c19eba450a0471490d134f2b92c99)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
6ae2931c by Lionel Landwerlin at 2026-04-22T14:34:49+02:00
anv: fix compute push constant allocations on pre Gfx12.5 platforms

MEDIA_CURBE_LOAD::CURBETotalDataLength needs to be 64B aligned.

Signed-off-by: Lionel Landwerlin <[email protected]>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit 773fef12cd0d8a8007891fce15d506613d920bc8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
2bd88427 by Lionel Landwerlin at 2026-04-22T14:34:49+02:00
anv: fix invalid value for push block index

Probably worked because we could always reach to things through the
binding table and the index was the same.

Signed-off-by: Lionel Landwerlin <[email protected]>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit 3256fab5a363f9bf4e749cd8f7473405334a2816)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
3a02ea44 by Lionel Landwerlin at 2026-04-22T14:34:49+02:00
anv: fix debug printfs on hang

Signed-off-by: Lionel Landwerlin <[email protected]>
Fixes: 0932d0c7e0 ("anv/xe: rework set_lost handling in xe_exec_ioctl()")
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit c0c324fcb21023e6d7a838d0120c75bfa10b5e7c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
3430163e by Lionel Landwerlin at 2026-04-22T14:34:49+02:00
anv: fixup compute queue detection

I ran into this case where genX(cmd_buffer_emit_bt_pool_base_address)
was returning immediately because it considered an RCS engine
emulating a compute queue as neither a render nor a compute queue.

Signed-off-by: Lionel Landwerlin <[email protected]>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <[email protected]>
(cherry picked from commit d581b7282bb4c5a99fd5783dacede223f04391d8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
696e7ac6 by Sagar Ghuge at 2026-04-22T14:34:49+02:00
anv: Fix Wa_14021821874, Wa_14018813551, Wa_14026600921

StackSizePerRay is the RTDispatchGlobals::AsyncStackSize and
DisableRTGlobalsKnownValues is to interpret how many Max BVH levels we
need to use. It's not relevant to Vulkan, since we have just 2 fixed BVH
levels.

Fixes: cb423ee6 ("anv: Fix Wa_14021821874, Wa_14018813551, Wa_14026600921")
Fixes: c1a44e8d ("anv: force StackIDControl value for Wa_14021821874")
Signed-off-by: Sagar Ghuge <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
(cherry picked from commit 7a627fa8f31657fcd3ee780dadf7fa5033464c13)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
e4f7829b by Erik Faye-Lund at 2026-04-22T14:34:50+02:00
dri: deprecate post-processing dri-confs

The post-processing infrastructure is showing it's age; it's written
using TGSI, which has been on the way out for a long time. There's also
few actually useful filters in there, and there are better tools out
there to inject shaders into applications.

Let's mark this as deprecated, so we can delete it in the future. Having
a deprecation period makes it easier for any potential users to find
alternatives in a timely matter.

Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Acked-by: Christian Gmeiner <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
188d2486 by Zan Dobersek at 2026-04-22T14:34:50+02:00
tu/a8xx: remove enforced TU_DEBUG_FLUSHALL

Remove the TU_DEBUG_FLUSHALL option that was force-enabled for a8xx chips.
The problematic CTS cases that required it were failing due to indirect
draw commands sourcing draw data from buffers whose content was prepared
by compute tasks.

Up until a8xx, firmware was managing an implicit wait before any indirect
draw parameters were read, with a delayed CP_WAIT_FOR_ME emitted only when
necessary or on devices enabling indirect_draw_wfm_quirk due to bugged
firmware. That implicit wait is gone on a8xx, so CP_WAIT_FOR_ME should be
emitted immediately, which also matches behavior of the proprietary driver.

Signed-off-by: Zan Dobersek <[email protected]>
(cherry picked from commit 9931034dca07492b072ce3f4ef6f3bde4d2d0e1d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
c61af627 by David Rosca at 2026-04-22T14:34:50+02:00
ac/parse_ib: Fix printing enc recon VAs on VCN5

Fixes: f8f80c37000 ("ac/parse_ib: Fix VCN address parsing")
Reviewed-by: Benjamin Cheng <[email protected]>
(cherry picked from commit 27dbe8280005113a4fc82fce1ae00614e3942ed8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
58f2b876 by Timothy Arceri at 2026-04-22T14:34:50+02:00
glcpp: fix paste within macro function expansion

Note the tests added in 89cd6df03481 were wrong (confirmed in gcc)
I've updated them to the expected outcome and enabled the paste
test from 475222b0224c.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13863
Fixes: d5cd40343f4a ("Expand macro arguments before performing argument substitution.")

Reviewed-by: Eric R. Smith <[email protected]>
(cherry picked from commit 5f374908555f437ee5945a7d191d1cac6da3dfe2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
7e9886de by Samuel Pitoiset at 2026-04-22T14:34:50+02:00
radv: fix GPU hangs with PS epilogs and secondaries properly

The previous fix was incomplete because if the same graphics pipeline
and the same PS epilog are rebind after vkCmdExecuteCommands(), the PS
epilog state wouldn't be re-emitted, and it will use a wrong VA (in case
both fragment shader user SGPRs aren't similar either).

Resetting the PS epilog to NULL in the primary should prevent any
issues, but this tracking still need to be improved because it caused
two issues recently.

Fixes: 1a00587c44e ("radv: fix a GPU hang with PS epilogs and secondary command buffers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15176
Signed-off-by: Samuel Pitoiset <[email protected]>
(cherry picked from commit a73fc90bcd1380cf8dc2d88d8d94594ddd77fd2e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41104>

- - - - -
9445e5d0 by Eric Engestrom at 2026-04-22T18:42:56+02:00
VERSION: bump for 26.1.0-rc2

- - - - -
025a3b4d by Timo Aaltonen at 2026-04-25T16:22:00+03:00
Merge branch 'upstream-experimental' into debian-experimental

- - - - -
c0b4094f by Timo Aaltonen at 2026-04-27T09:22:52+03:00
version bump

- - - - -
2d8cf845 by Timo Aaltonen at 2026-04-28T09:09:19+03:00
releasing package mesa version 26.1.0~rc2-1

- - - - -


69 changed files:

- + .pick_status.json
- VERSION
- debian/changelog
- docs/features.txt
- src/amd/common/ac_parse_ib.c
- src/amd/vulkan/radv_cmd_buffer.c
- src/amd/vulkan/radv_rra.c
- src/amd/vulkan/radv_shader.c
- src/amd/vulkan/radv_shader_args.c
- src/compiler/glsl/glcpp/glcpp-parse.y
- src/compiler/glsl/glcpp/tests/114-paste-integer-tokens.c.expected
- src/compiler/glsl/glcpp/tests/150-token-accidental-concatenation.c
- src/compiler/glsl/glcpp/tests/150-token-accidental-concatenation.c.expected
- src/compiler/nir/nir_gather_info.c
- src/freedreno/ds/fd_pps_driver.cc
- src/freedreno/ir3/ir3_preamble.c
- src/freedreno/ir3/ir3_shader.h
- src/freedreno/vulkan/tu_autotune.cc
- src/freedreno/vulkan/tu_autotune.h
- src/freedreno/vulkan/tu_cmd_buffer.cc
- src/freedreno/vulkan/tu_device.cc
- src/freedreno/vulkan/tu_query_pool.cc
- src/freedreno/vulkan/tu_shader.cc
- src/gallium/drivers/asahi/agx_state.c
- src/gallium/drivers/d3d12/d3d12_video_dec.h
- src/gallium/drivers/d3d12/d3d12_video_dec_hevc.cpp
- src/gallium/drivers/freedreno/ir3/ir3_const.h
- src/gallium/drivers/nouveau/nv50/nv50_screen.c
- src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
- src/gallium/drivers/r600/evergreen_state.c
- src/gallium/drivers/r600/evergreend.h
- src/gallium/drivers/r600/r600_pipe.h
- src/gallium/drivers/r600/r600_shader_common.h
- src/gallium/drivers/r600/r600_state.c
- src/gallium/drivers/r600/r600_state_common.c
- src/gallium/drivers/r600/r600d.h
- src/gallium/drivers/r600/sfn/sfn_assembler.cpp
- src/gallium/drivers/r600/sfn/sfn_instr_mem.cpp
- src/gallium/drivers/r600/sfn/sfn_instr_mem.h
- src/gallium/drivers/r600/sfn/sfn_shader_vs.cpp
- src/gallium/drivers/radeonsi/si_get.c
- src/gallium/frontends/dri/dri_screen.c
- src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
- src/imagination/vulkan/pvr_instance.c
- src/intel/compiler/brw/brw_rt.h
- src/intel/compiler/brw/brw_workaround.cpp
- src/intel/compiler/elk/elk_eu_opcodes.h
- src/intel/compiler/elk/elk_fs.cpp
- src/intel/compiler/elk/elk_ir_performance.cpp
- src/intel/compiler/elk/elk_lower_logical_sends.cpp
- src/intel/compiler/elk/elk_schedule_instructions.cpp
- src/intel/compiler/elk/elk_shader.cpp
- src/intel/compiler/elk/elk_vec4.cpp
- src/intel/vulkan/anv_nir_apply_pipeline_layout.c
- src/intel/vulkan/anv_private.h
- src/intel/vulkan/genX_cmd_buffer.c
- src/intel/vulkan/genX_cmd_compute.c
- src/intel/vulkan/genX_simple_shader.c
- src/intel/vulkan/xe/anv_batch_chain.c
- src/mesa/state_tracker/st_extensions.c
- src/nouveau/compiler/nak_nir_lower_tex.c
- src/panfrost/ci/panfrost-g52-fails.txt
- src/panfrost/lib/pan_buffer.c
- src/panfrost/lib/pan_mod.c
- src/panfrost/vulkan/panvk_vX_physical_device.c
- src/vulkan/runtime/vk_nir_lower_descriptor_heaps.c
- src/vulkan/runtime/vk_nir_lower_descriptor_heaps.h
- src/vulkan/runtime/vk_pipeline.c
- src/vulkan/runtime/vk_shader.c


The diff was not included because it is too large.


View it on GitLab: https://salsa.debian.org/xorg-team/lib/mesa/-/compare/11eb76c22ed08073c5b2c841b55dde07bd543b01...2d8cf845448f907b460568728a69295249e284d7

-- 
View it on GitLab: https://salsa.debian.org/xorg-team/lib/mesa/-/compare/11eb76c22ed08073c5b2c841b55dde07bd543b01...2d8cf845448f907b460568728a69295249e284d7
You're receiving this email because of your account on salsa.debian.org. Manage all notifications: https://salsa.debian.org/-/profile/notifications | Help: https://salsa.debian.org/help
lmpx.com only provides a reader for public news (NNTP) servers. It is not affiliated with the servers or forums shown here and is not responsible for the content of articles, which is written by their respective authors.