Bug#834844: release-notes: document that mips* arches now require a R2 CPU

On 08/25/2016 06:42 AM, James Cowgill wrote:
> Hi,
>
> On 25/08/16 14:17, Ed Swierk wrote:
>> This mips32r2 requirement also appears to exclude Cavium Octeon:
>>
>> https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h#n50
>>
>> If that's accurate, it would be worth mentioning in the release notes as well.
>
> *sigh* Cavium Octeon machines do support R2 (mips32r2 is a subset of
> mips64r2) but for some reason unknown to me, don't actually expose this.
> I've adjusted the check to look for mips64r2 as well and attached a new
> patch.
>

Yes, *all* OCTEON CPUs have always been r2 (or better).

At the time the code was written, there were good reasons not to set:

  #define cpu_has_mips32r2	0

This was discussed on the lmo mailing lists, but I forget what they were 
at this point.

David Daney

> Thanks,
> James
>
>> On Thu, Aug 25, 2016 at 4:10 AM, James Cowgill <[email protected]> wrote:
>>> Control: tags -1 patch
>>>
>>> On 19/08/16 22:42, Aurelien Jarno wrote:
>>>> This is something to be expected as the mips and mipsel port now
>>>> defaults to using R2 instructions set. This means the Loongson 2
>>>> CPUs are not supported anymore (this includes the Yeeloong machine).
>>>>
>>>> I have asked many times to document this changes in the release notes,
>>>> but this hasn't been done yet. I am therefore reassigning the bug there,
>>>> Cc:ing debian-mips so that somone can take care of that.
>>>
>>> How about the attached patch? It's loosely based on the i686 notes just
>>> above.
>>>
>>> I also changed the "human readable" mips architecture names since all
>>> the other arches seem to have them.
>>>
>>> James
>