[PATCH 2/2] PCI/ASPM: Avoid L0s and L1 on Freescale Root Ports
Bjorn Helgaas <[email protected]>
| Newsgroups | gmane.linux.kernel.pci,gmane.linux.ports.ppc64.devel,gmane.linux.debian.ports.powerpc,gmane.linux.kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Bjorn Helgaas <[email protected]> Christian reported that f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for devicetree platforms") broke booting on the A-EON X5000. Fixes: f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for devicetree platforms") Fixes: df5192d9bb0e ("PCI/ASPM: Enable only L0s and L1 for devicetree platforms" ) Reported-by: Christian Zigotzky <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Helgaas <[email protected]> --- drivers/pci/quirks.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 214ed060ca1b..44e780718953 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2525,6 +2525,18 @@ static void quirk_disable_aspm_l0s_l1(struct pci_dev *dev) */ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x1080, quirk_disable_aspm_l0s_l1); +/* + * Remove ASPM L0s and L1 support from cached copy of Link Capabilities so + * aspm.c won't try to enable them. + */ +static void quirk_disable_aspm_l0s_l1_cap(struct pci_dev *dev) +{ + dev->lnkcap &= ~PCI_EXP_LNKCAP_ASPM_L0S; + dev->lnkcap &= ~PCI_EXP_LNKCAP_ASPM_L1; + pci_info(dev, "ASPM: L0s L1 removed from Link Capabilities to work around device defect\n"); +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, 0x0451, quirk_disable_aspm_l0s_l1_cap); + /* * Some Pericom PCIe-to-PCI bridges in reverse mode need the PCIe Retrain * Link bit cleared after starting the link retrain process to allow this -- 2.43.0