Re: Re: 82559ER: PHY detection fails, MII not accessible

On Tue, 16 Sep 2003, Malte Cornils wrote:

> On Wednesday 10 September 2003 16:15, I wrote:
> > I'm seeing some interesting things with some 82559ER controllers. We were
> > attempting link beat detection, on one of the controllers, this worked
> > flawlessly; the other seems to have an unsupported register layout.
> > [...]
> > Maybe the EEPROM is structured differently on this specific chipset, so the
> > assumption that EEPROM info is stored in eeprom_contents[6] is wrong?
> > eeprom_contents[3] and eeprom_contents[4] seem like good candidates :-)

Errrmm, these locations are used both by the software and by the
hardware.

I find it very unlikely that Intel would have changed the EEPROM layout
in a way that was so obviously pointlessly incompatible with provious
versions of the chip.  Typical incompatibilities are much more subtle.

My guess is that your motherboard vendor (this is an on-motherboard
implementation, correct?) programmed the configuration EEPROM incorrectly.

-- 
Donald Becker				[email protected]
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