Re: [PATCH v2] mtd: rawnand: sunxi: add H616 MBUS DMA support
Miquel Raynal <[email protected]>
| Newsgroups | gmane.linux.kernel,gmane.linux.drivers.mtd,gmane.linux.ports.arm.kernel |
|---|---|
| Message-ID | <[email protected]> |
Hi James, On 17/07/2026 at 10:41:58 -06, James Hilliard <[email protected]> wrote: > The H616 NAND controller uses a descriptor-based internal MBUS DMA > engine instead of the direct address and count registers used by the > A23/A33 controller. Since the driver does not support these descriptors, > it currently attempts to request an external rxtx DMA channel and falls > back to PIO when none is provided. > > Add a single-descriptor backend to the existing ECC page DMA paths. > Allocate the descriptor coherently, constrain data mappings to the > controller's 32-bit address range, program the H6-style data block mask, > and request an interrupt for both command and DMA completion. Keep the > existing external DMA and legacy MBUS DMA paths unchanged, and fall back > to PIO if the descriptor cannot be allocated. > > With identical kernels except for this patch, running > flash_speed -d -b 1906 -c 100 /dev/mtd6 on an H616 board with 2 KiB-page > SLC NAND reported: > > PIO descriptor DMA > eraseblock write 3365 KiB/s 4192 KiB/s > eraseblock read 6454 KiB/s 16040 KiB/s > page write 3254 KiB/s 4021 KiB/s > page read 6419 KiB/s 15686 KiB/s > > Signed-off-by: James Hilliard <[email protected]> This patch does not apply (linux-mtd repository, nand/next branch). You need to rebase and send a new iteration. Thansk, Miquèl