[PATCH v2 0/3] mtd/spi-mem: Enable DQS support
Miquel Raynal <[email protected]>
| Newsgroups | gmane.linux.kernel,gmane.linux.kernel.spi.devel,gmane.linux.drivers.mtd |
|---|---|
| Message-ID | <20260807-winbond-nand-next-phy-tuning-v2-0-73595e89d6e3@bootlin.com> |
For his PHY tuning series on the Cadence QSPI controller embedded in TI SoCs, Santhosh initially needed to access the availability of the DQS (data strobe) signal. This is a chip dependent capability, which may sometimes be enabled. Create a SPI memory flag for it, let the SPI NAND core set this flag when it knows about the capability, and expect manufacturer drivers to enable it for octal needs when the chips are compatible. This is an alternative at needing a DT property. Please note that there are a few blind spots: - the line may not be wired (this would be surprising, but can be flagged this time by a DT property) - manufacturer drivers must enable the feature if it is available (especially for high speed DTR modes) - this implementation is proposed for SPI NANDs only, if this proposal is accepted the same approach may be taken in SPI NOR. Here is the original thread which lead to this series: https://lore.kernel.org/linux-spi/[email protected]/T/#ma79fc364d7b882a48dbdf47203dde75df4bb0ec4 This series was compile tested only at this stage. As DDR tuning does not yet work on my board, I cannot make sure this change has a real impact. Mark, as agreed, you can take the spi-mem patch through spi for this cycle, and I will pick up the remaining spi-nand patches after the merge window. Signed-off-by: Miquel Raynal <[email protected]> --- Changes in v2: - Dropped the RFC prefix. - Rebased on top of v7.2-rc1. - Dropped the spi patch for now, just allowing to use DQS on a few Winbond SPI NANDs (can be improved later). - Link to v1: https://lore.kernel.org/r/20260205-winbond-nand-next-phy-tuning-v1-0-5e7d3976f0f1@bootlin.com --- Miquel Raynal (3): spi: spi-mem: Flag DQS capability mtd: spi-nand: Set the DQS spi-mem capability if available mtd: spi-nand: winbond: Enable the DQS pin on W35N**JW series drivers/mtd/nand/spi/core.c | 4 ++++ drivers/mtd/nand/spi/winbond.c | 8 ++++---- drivers/spi/spi-mem.c | 32 ++++++++++++++++++++++++++++++++ include/linux/mtd/spinand.h | 1 + include/linux/spi/spi-mem.h | 4 ++++ 5 files changed, 45 insertions(+), 4 deletions(-) --- base-commit: 6f787fd9f19e4e1bc80d3eee1a394eb65defdff7 change-id: 20260205-winbond-nand-next-phy-tuning-aabefc018032 Best regards, -- Miquel Raynal <[email protected]>