proj/linux-patches:6.1 commit in: /
"Mike Pagano" <[email protected]>
| Newsgroups | gmane.linux.gentoo.cvs |
|---|---|
| Message-ID | <1786042264.e5d793b8f49ebee1acca3dd23f25c60858da30b4.mpagano@gentoo> |
commit: e5d793b8f49ebee1acca3dd23f25c60858da30b4
Author: Mike Pagano <mpagano <AT> gentoo <DOT> org>
AuthorDate: Thu Aug 6 18:51:04 2026 +0000
Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org>
CommitDate: Thu Aug 6 18:51:04 2026 +0000
URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=e5d793b8
Linux patch 6.1.181
Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org>
0000_README | 4 +
1180_linux-6.1.181.patch | 208 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 212 insertions(+)
diff --git a/0000_README b/0000_README
index d24144c2..869e1217 100644
--- a/0000_README
+++ b/0000_README
@@ -763,6 +763,10 @@ Patch: 1179_linux-6.1.180.patch
From: https://www.kernel.org
Desc: Linux 6.1.180
+Patch: 1180_linux-6.1.181.patch
+From: https://www.kernel.org
+Desc: Linux 6.1.181
+
Patch: 1500_XATTR_USER_PREFIX.patch
From: https://bugs.gentoo.org/show_bug.cgi?id=470644
Desc: Support for namespace user.pax.* on tmpfs.
diff --git a/1180_linux-6.1.181.patch b/1180_linux-6.1.181.patch
new file mode 100644
index 00000000..6c966dda
--- /dev/null
+++ b/1180_linux-6.1.181.patch
@@ -0,0 +1,208 @@
+diff --git a/Makefile b/Makefile
+index ea4eefa148dce5..001fca49a9620f 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ VERSION = 6
+ PATCHLEVEL = 1
+-SUBLEVEL = 180
++SUBLEVEL = 181
+ EXTRAVERSION =
+ NAME = Curry Ramen
+
+diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
+index 4f5968810450d8..bd7868a5680024 100644
+--- a/arch/x86/entry/entry_64.S
++++ b/arch/x86/entry/entry_64.S
+@@ -966,6 +966,8 @@ SYM_CODE_START_LOCAL(paranoid_entry)
+ IBRS_ENTER save_reg=%r15
+ UNTRAIN_RET
+
++ HANDLE_INTR_SAFERET 8(%rsp)
++
+ RET
+ SYM_CODE_END(paranoid_entry)
+
+@@ -1070,6 +1072,9 @@ SYM_CODE_START_LOCAL(error_entry)
+ movl %ecx, %eax /* zero extend */
+ cmpq %rax, RIP+8(%rsp)
+ je .Lbstep_iret
++
++ HANDLE_INTR_SAFERET 8(%rsp)
++
+ cmpq $.Lgs_change, RIP+8(%rsp)
+ jne .Lerror_entry_done_lfence
+
+diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
+index 818a5913f21950..93e8db6f1ffc56 100644
+--- a/arch/x86/include/asm/nospec-branch.h
++++ b/arch/x86/include/asm/nospec-branch.h
+@@ -87,6 +87,50 @@
+ add $(BITS_PER_LONG/8), %_ASM_SP; \
+ lfence;
+
++/*
++ * Helper for detecting if an interrupt occurred at an unsafe location within
++ * Safe-RET. If Safe-RET is interrupted after the CALL or LEA the RSB may get
++ * poisoned by the interrupt handler.
++ *
++ * The Safe-RET sequence is:
++ *
++ * CALL
++ * LEA 8(%RSP), %RSP
++ * RET
++ *
++ * The two CMPs below check whether RIP points to after the CALL or after the
++ * LEA.
++ *
++ * The LFENCE below is to address this particular speculation case:
++ *
++ * 1. Userspace runs and poisons the BTB around the safe-RET routine
++ *
++ * 2. Userspace triggers some kind of exception
++ *
++ * 3. Kernel executes error_entry() and mis-speculates the branch into thinking
++ * it actually came from kernel space
++ *
++ * 4. The kernel then further mis-speculates that the exception occurred due
++ * to an interrupted safe-RET
++ *
++ * 5. The handle_interrupted_saferet() routine speculatively executes and
++ * speculatively does a safe-RET. But this is unsafe since it was never
++ * untrained.
++ *
++ * The LFENCE fixes this by ensuring step 5 is never reached speculatively.
++ * Note that this LFENCE only occurs if safe-RET was actually interrupted (so
++ * it's outside of the normal path).
++ */
++#define __HANDLE_INTR_SAFERET(name, pt_regs) \
++ cmpq $(name), RIP+pt_regs; \
++ jb 1f; \
++ cmpq $(name)+5, RIP+pt_regs; \
++ ja 1f; \
++ lfence; \
++ leaq pt_regs, %rdi; \
++ call handle_interrupted_saferet; \
++ 1:
++
+ #ifdef __ASSEMBLY__
+
+ /*
+@@ -201,6 +245,14 @@
+ #endif
+ .endm
+
++.macro HANDLE_INTR_SAFERET pt_regs
++#ifdef CONFIG_MITIGATION_SRSO
++ ALTERNATIVE_2 "", \
++ __stringify(__HANDLE_INTR_SAFERET(srso_safe_ret, \pt_regs)), X86_FEATURE_SRSO, \
++ __stringify(__HANDLE_INTR_SAFERET(srso_alias_safe_ret, \pt_regs)), X86_FEATURE_SRSO_ALIAS
++#endif
++.endm
++
+ /*
+ * Macro to execute VERW insns that mitigate transient data sampling
+ * attacks such as MDS or TSA. On affected systems a microcode update
+@@ -480,6 +532,10 @@ static __always_inline void x86_idle_clear_cpu_buffers(void)
+ x86_clear_cpu_buffers();
+ }
+
++void srso_safe_ret(void);
++void srso_alias_safe_ret(void);
++void handle_interrupted_saferet(struct pt_regs *regs);
++
+ #endif /* __ASSEMBLY__ */
+
+ #endif /* _ASM_X86_NOSPEC_BRANCH_H_ */
+diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
+index a0b362ac50a1b3..501db29d1ca0db 100644
+--- a/arch/x86/kernel/cpu/bugs.c
++++ b/arch/x86/kernel/cpu/bugs.c
+@@ -3398,3 +3398,42 @@ ssize_t cpu_show_vmscape(struct device *dev, struct device_attribute *attr, char
+ return cpu_show_common(dev, attr, buf, X86_BUG_VMSCAPE);
+ }
+ #endif
++
++#ifdef CONFIG_MITIGATION_SRSO
++/*
++ * Called during exception/interrupt entry if interrupted during the
++ * safe-RET sequence. The safe-RET sequence consists of 3 instructions:
++ *
++ * CALL
++ * LEA 8(%RSP), %RSP
++ * RET
++ *
++ * An interrupt after the CALL or after the LEA could potentially lead
++ * to branch predictor poisoning and results in the sequence not being
++ * able to be safely resumed.
++ *
++ * Therefore, modify the regs state as if the remaining part of the
++ * safe-RET sequence executed so the interrupt returns back to the
++ * desired return target, instead of the to the safe-RET sequence.
++ */
++void noinstr handle_interrupted_saferet(struct pt_regs *regs)
++{
++ unsigned long rip = regs->ip;
++
++ if (rip == (unsigned long) srso_safe_ret ||
++ rip == (unsigned long) srso_alias_safe_ret) {
++ /* Modify stack pointer as if LEA executed: */
++ regs->sp += 8;
++ }
++
++ /*
++ * Adjust registers as if RET executed:
++ *
++ * 1. Read the return address off the stack and into rIP:
++ */
++ regs->ip = *(unsigned long *)(regs->sp);
++
++ /* 2. Pop rIP off the stack: */
++ regs->sp += 8;
++}
++#endif /* CONFIG_MITIGATION_SRSO */
+diff --git a/arch/x86/lib/retpoline.S b/arch/x86/lib/retpoline.S
+index e426615000948b..03ea0273d7b484 100644
+--- a/arch/x86/lib/retpoline.S
++++ b/arch/x86/lib/retpoline.S
+@@ -115,10 +115,24 @@ __EXPORT_THUNK(srso_alias_untrain_ret)
+ #endif
+
+ SYM_START(srso_alias_safe_ret, SYM_L_GLOBAL, SYM_A_NONE)
++
++ /*
++ * Tell objtool that those are not function pointers referenced by
++ * __HANDLE_INTR_SAFERET(). Below too.
++ */
++ ANNOTATE_NOENDBR
++
++ /*
++ * Safe-RET sequence. If you need to change it, adjust
++ * handle_interrupted_saferet() too.
++ */
+ lea 8(%_ASM_SP), %_ASM_SP
+ UNWIND_HINT_FUNC
++
++ ANNOTATE_NOENDBR
+ ANNOTATE_UNRET_SAFE
+ ret
++ /* End of Safe-RET sequence */
+ int3
+ SYM_FUNC_END(srso_alias_safe_ret)
+
+@@ -234,8 +248,14 @@ SYM_START(srso_untrain_ret, SYM_L_GLOBAL, SYM_A_NONE)
+ * the stack.
+ */
+ SYM_INNER_LABEL(srso_safe_ret, SYM_L_GLOBAL)
++ /*
++ * Safe-RET sequence. If you need to change it, adjust
++ * handle_interrupted_saferet() too.
++ */
+ lea 8(%_ASM_SP), %_ASM_SP
+ ret
++ /* End of Safe-RET sequence */
++
+ int3
+ int3
+ /* end of movabs */