[PATCH] aic7xxx: don't reset chip on pause

Linux Kernel Mailing List <[email protected]> Fri, 25 Feb 2005 20:35:21 +0000
Newsgroups gmane.linux.kernel.commits.2-4
Message-ID <[email protected]>
ChangeSet 1.1553, 2005/02/25 17:35:21-03:00, [email protected]

	[PATCH] aic7xxx: don't reset chip on pause
	
	(resend)
	Patch below taken from RHEL3 Update 4 kernel 2.4.21-27.EL, fixes a bug
	in the aic79xx and aic7xxx drivers, where upon trying to pause the
	controller chip, it is accidentally hard-reset.  This causes PCI
	Parity errors to appear on Dell PowerEdge 4600 servers as the inb()
	immediately after accidental reset receives corrupted data.
	
	Patch was submitted by Justin Gibbs many moons ago, but never applied
	to mainline 2.4.  It's in mainline 2.6.  Marcelo, please apply.
	
	Signed-off-by: Matt Domsch <[email protected]>



 aic79xx_pci.c |    4 +++-
 aic7xxx_pci.c |    4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)


diff -Nru a/drivers/scsi/aic7xxx/aic79xx_pci.c b/drivers/scsi/aic7xxx/aic79xx_pci.c
--- a/drivers/scsi/aic7xxx/aic79xx_pci.c	2005-02-25 18:02:16 -08:00
+++ b/drivers/scsi/aic7xxx/aic79xx_pci.c	2005-02-25 18:02:16 -08:00
@@ -451,8 +451,10 @@
 	 * or read prefetching could be initiated by the
 	 * CPU or host bridge.  Our device does not support
 	 * either, so look for data corruption and/or flaged
-	 * PCI errors.
+	 * PCI errors.  First pause without causing another
+	 * chip reset.
 	 */
+	hcntrl &= ~CHIPRST;
 	ahd_outb(ahd, HCNTRL, hcntrl|PAUSE);
 	while (ahd_is_paused(ahd) == 0)
 		;
diff -Nru a/drivers/scsi/aic7xxx/aic7xxx_pci.c b/drivers/scsi/aic7xxx/aic7xxx_pci.c
--- a/drivers/scsi/aic7xxx/aic7xxx_pci.c	2005-02-25 18:02:16 -08:00
+++ b/drivers/scsi/aic7xxx/aic7xxx_pci.c	2005-02-25 18:02:16 -08:00
@@ -1284,8 +1284,10 @@
 	 * or read prefetching could be initiated by the
 	 * CPU or host bridge.  Our device does not support
 	 * either, so look for data corruption and/or flagged
-	 * PCI errors.
+	 * PCI errors.  First pause without causing another
+	 * chip reset.
 	 */
+	hcntrl &= ~CHIPRST;
 	ahc_outb(ahc, HCNTRL, hcntrl|PAUSE);
 	while (ahc_is_paused(ahc) == 0)
 		;