[TG3]: Fix jumbo frames phy settings

ChangeSet 1.1448.127.11, 2005/03/23 11:10:16-08:00, [email protected]

	[TG3]: Fix jumbo frames phy settings
	
	Fix jumbo frame settings on all copper phys that support jumbo frames by
	setting the fifo elasticity bit. This setting is for the phy's tx fifo to
	properly handle jumbo frames. Note that a similar jumbo frame fix for the
	phy's rx fifo was made to tg3 in the past.
	
	Signed-off-by: Michael Chan <[email protected]>
	ACKed-by: Jeff Garzik <[email protected]>
	Signed-off-by: David S. Miller <[email protected]>



 tg3.c |   13 +++++++++++++
 tg3.h |    1 +
 2 files changed, 14 insertions(+)


diff -Nru a/drivers/net/tg3.c b/drivers/net/tg3.c
--- a/drivers/net/tg3.c	2005-03-25 17:03:40 -08:00
+++ b/drivers/net/tg3.c	2005-03-25 17:03:40 -08:00
@@ -852,6 +852,19 @@
 		    !tg3_readphy(tp, MII_TG3_AUX_CTRL, &phy_reg))
 			tg3_writephy(tp, MII_TG3_AUX_CTRL, phy_reg | 0x4000);
 	}
+
+	/* Set phy register 0x10 bit 0 to high fifo elasticity to support
+	 * jumbo frames transmission.
+	 */
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
+	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750) {
+		u32 phy_reg;
+
+		if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg))
+		    tg3_writephy(tp, MII_TG3_EXT_CTRL,
+				 phy_reg | MII_TG3_EXT_CTRL_FIFO_ELASTIC);
+	}
+
 	tg3_phy_set_wirespeed(tp);
 	return 0;
 }
diff -Nru a/drivers/net/tg3.h b/drivers/net/tg3.h
--- a/drivers/net/tg3.h	2005-03-25 17:03:40 -08:00
+++ b/drivers/net/tg3.h	2005-03-25 17:03:40 -08:00
@@ -1516,6 +1516,7 @@
 #define  MII_TG3_CTRL_ENABLE_AS_MASTER	0x1000
 
 #define MII_TG3_EXT_CTRL		0x10 /* Extended control register */
+#define  MII_TG3_EXT_CTRL_FIFO_ELASTIC	0x0001
 #define  MII_TG3_EXT_CTRL_LNK3_LED_MODE	0x0002
 #define  MII_TG3_EXT_CTRL_TBI		0x8000