[PATCH] x86_64: Handle MM going away in context switch.

ChangeSet 1.1495, 2005/04/07 09:02:29-03:00, [email protected]

	[PATCH] x86_64: Handle MM going away in context switch.
	
	Handle MM going away in context switch.
	
	Fix a long standing bug lazy TLB handling on x86-64. When
	switching to a lazy TLB thread we must handle the race of the
	mm currently going away. If that's the case always load the
	page tables of the next process. This way we avoid having
	freed page tables in a CPU's TLB, which can lead to machine
	checks in some situations on Opteron.
	
	Credit goes to some anonymous AMD debugging wizards who tracked down
	the problem. I did the fix. All blame to me.
	
	Signed-off-by: Andi Kleen <[email protected]>
	
	Index: linux/include/asm-x86_64/mmu_context.h
	===================================================================



 mmu_context.h |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)


diff -Nru a/include/asm-x86_64/mmu_context.h b/include/asm-x86_64/mmu_context.h
--- a/include/asm-x86_64/mmu_context.h	2005-04-07 11:03:45 -07:00
+++ b/include/asm-x86_64/mmu_context.h	2005-04-07 11:03:45 -07:00
@@ -60,9 +60,11 @@
 			out_of_line_bug();
 		if(!test_and_set_bit(cpu, &next->cpu_vm_mask)) {
 			/* We were in lazy tlb mode and leave_mm disabled 
-			 * tlb flush IPI delivery. We must flush our tlb.
+			 * tlb flush IPI delivery. We must reload the page 
+			 * table.
 			 */
-			local_flush_tlb();
+			*read_pda(level4_pgt) = __pa(next->pgd) | _PAGE_TABLE;
+			__flush_tlb();
 		}
 		if (!test_and_set_bit(cpu, &next->context.cpuvalid))
 			load_LDT(next);