drm/i915/gvt: Fix gen8/9_render_mmio_list[0] don't take effect

Web:        https://git.kernel.org/torvalds/c/d9df2c0943811f3880393be738ab86675029f3d0
Commit:     d9df2c0943811f3880393be738ab86675029f3d0
Parent:     24b8ef699e8221d2b7f813adaab13eec053e1507
Refname:    refs/heads/master
Author:     Xiong Zhang <[email protected]>
AuthorDate: Wed Dec 27 05:01:16 2017 +0800
Committer:  Rodrigo Vivi <[email protected]>
CommitDate: Thu Feb 1 07:30:17 2018 -0800

    drm/i915/gvt: Fix gen8/9_render_mmio_list[0] don't take effect
    
    while(mmio++) increase mmio to next, mmio[0] never take effect
    in while loop.
    
    This patch change while to for and fix the above issue.
    
    v2: Correct Fixes format.(Zhenyu)
    v3: Rebase to latest staging.(Zhenyu)
    
    Fixes: 83164886e455("drm/i915/gvt: Select appropriate mmio list at initialization time")
    Signed-off-by: Xiong Zhang <[email protected]>
    Signed-off-by: Zhenyu Wang <[email protected]>
    Signed-off-by: Rodrigo Vivi <[email protected]>
---
 drivers/gpu/drm/i915/gvt/mmio_context.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index 74834395dd89..48ee61ac9bc5 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -80,7 +80,7 @@ static struct engine_mmio gen8_engine_mmio_list[] __cacheline_aligned = {
 	{BCS, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
 	{BCS, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
 	{BCS, RING_EXCC(BLT_RING_BASE), 0x0, false}, /* 0x22028 */
-	{ /* Terminated */ }
+	{RCS, INVALID_MMIO_REG, 0, false } /* Terminated */
 };
 
 static struct engine_mmio gen9_engine_mmio_list[] __cacheline_aligned = {
@@ -146,7 +146,7 @@ static struct engine_mmio gen9_engine_mmio_list[] __cacheline_aligned = {
 	{RCS, GEN8_GARBCNTL, 0x0, false}, /* 0xb004 */
 	{RCS, GEN7_FF_THREAD_MODE, 0x0, false}, /* 0x20a0 */
 	{RCS, FF_SLICE_CS_CHICKEN2, 0xffff, false}, /* 0x20e4 */
-	{ /* Terminated */ }
+	{RCS, INVALID_MMIO_REG, 0, false } /* Terminated */
 };
 
 static struct {
@@ -310,8 +310,8 @@ static void switch_mmio(struct intel_vgpu *pre,
 	if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
 		switch_mocs(pre, next, ring_id);
 
-	mmio = dev_priv->gvt->engine_mmio_list;
-	while (i915_mmio_reg_offset((mmio++)->reg)) {
+	for (mmio = dev_priv->gvt->engine_mmio_list;
+	     i915_mmio_reg_valid(mmio->reg); mmio++) {
 		if (mmio->ring_id != ring_id)
 			continue;
 		// save
--
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