Re: [PATCH v2 8/8] arm64: dts: fsd: Align continued properties and add missing blank lines

On Sat, 1 Aug 2026 at 16:07, Krzysztof Kozlowski
<[email protected]> wrote:
>
> Trivial white-space only changes to adjust to DTS coding style and fix
> dt-check-style strict warnings like:
>
>   [required-blank-lines] child node must be preceded by a blank line
>   [continuation-alignment] continuation should align to column 39 (under < or ")
>
> Reviewed-by: André Draszik <[email protected]>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---

Reviewed-by: Peter Griffin <[email protected]>

>  arch/arm64/boot/dts/tesla/fsd-evb.dts |  2 +
>  arch/arm64/boot/dts/tesla/fsd.dtsi    | 97 +++++++++++++++++++----------------
>  2 files changed, 55 insertions(+), 44 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> index 73b6a25e0e4d..503abe52a81c 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> @@ -53,9 +53,11 @@ simple-audio-card,dai-link@0 {
>                         cpu-0 {
>                                 sound-dai = <&i2s_0 0>;
>                         };
> +
>                         cpu-1 {
>                                 sound-dai = <&i2s_0 1>;
>                         };
> +
>                         codec {
>                                 sound-dai = <&tlv320aic3x>;
>                                 system-clock-frequency = <33000000>;
> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
> index 214d33ca7177..6766c78243a3 100644
> --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> @@ -43,12 +43,15 @@ cluster0 {
>                                 core0 {
>                                         cpu = <&cpucl0_0>;
>                                 };
> +
>                                 core1 {
>                                         cpu = <&cpucl0_1>;
>                                 };
> +
>                                 core2 {
>                                         cpu = <&cpucl0_2>;
>                                 };
> +
>                                 core3 {
>                                         cpu = <&cpucl0_3>;
>                                 };
> @@ -58,12 +61,15 @@ cluster1 {
>                                 core0 {
>                                         cpu = <&cpucl1_0>;
>                                 };
> +
>                                 core1 {
>                                         cpu = <&cpucl1_1>;
>                                 };
> +
>                                 core2 {
>                                         cpu = <&cpucl1_2>;
>                                 };
> +
>                                 core3 {
>                                         cpu = <&cpucl1_3>;
>                                 };
> @@ -73,12 +79,15 @@ cluster2 {
>                                 core0 {
>                                         cpu = <&cpucl2_0>;
>                                 };
> +
>                                 core1 {
>                                         cpu = <&cpucl2_1>;
>                                 };
> +
>                                 core2 {
>                                         cpu = <&cpucl2_2>;
>                                 };
> +
>                                 core3 {
>                                         cpu = <&cpucl2_3>;
>                                 };
> @@ -456,13 +465,13 @@ clock_imem: clock-controller@10010000 {
>                         reg = <0x0 0x10010000 0x0 0x3000>;
>                         #clock-cells = <1>;
>                         clocks = <&fin_pll>,
> -                               <&clock_cmu DOUT_CMU_IMEM_TCUCLK>,
> -                               <&clock_cmu DOUT_CMU_IMEM_ACLK>,
> -                               <&clock_cmu DOUT_CMU_IMEM_DMACLK>;
> +                                <&clock_cmu DOUT_CMU_IMEM_TCUCLK>,
> +                                <&clock_cmu DOUT_CMU_IMEM_ACLK>,
> +                                <&clock_cmu DOUT_CMU_IMEM_DMACLK>;
>                         clock-names = "fin_pll",
> -                               "dout_cmu_imem_tcuclk",
> -                               "dout_cmu_imem_aclk",
> -                               "dout_cmu_imem_dmaclk";
> +                                     "dout_cmu_imem_tcuclk",
> +                                     "dout_cmu_imem_aclk",
> +                                     "dout_cmu_imem_dmaclk";
>                 };
>
>                 clock_cmu: clock-controller@11c10000 {
> @@ -499,17 +508,17 @@ clock_peric: clock-controller@14010000 {
>                         reg = <0x0 0x14010000 0x0 0x3000>;
>                         #clock-cells = <1>;
>                         clocks = <&fin_pll>,
> -                               <&clock_cmu DOUT_CMU_PLL_SHARED0_DIV4>,
> -                               <&clock_cmu DOUT_CMU_PERIC_SHARED1DIV36>,
> -                               <&clock_cmu DOUT_CMU_PERIC_SHARED0DIV3_TBUCLK>,
> -                               <&clock_cmu DOUT_CMU_PERIC_SHARED0DIV20>,
> -                               <&clock_cmu DOUT_CMU_PERIC_SHARED1DIV4_DMACLK>;
> +                                <&clock_cmu DOUT_CMU_PLL_SHARED0_DIV4>,
> +                                <&clock_cmu DOUT_CMU_PERIC_SHARED1DIV36>,
> +                                <&clock_cmu DOUT_CMU_PERIC_SHARED0DIV3_TBUCLK>,
> +                                <&clock_cmu DOUT_CMU_PERIC_SHARED0DIV20>,
> +                                <&clock_cmu DOUT_CMU_PERIC_SHARED1DIV4_DMACLK>;
>                         clock-names = "fin_pll",
> -                               "dout_cmu_pll_shared0_div4",
> -                               "dout_cmu_peric_shared1div36",
> -                               "dout_cmu_peric_shared0div3_tbuclk",
> -                               "dout_cmu_peric_shared0div20",
> -                               "dout_cmu_peric_shared1div4_dmaclk";
> +                                     "dout_cmu_pll_shared0_div4",
> +                                     "dout_cmu_peric_shared1div36",
> +                                     "dout_cmu_peric_shared0div3_tbuclk",
> +                                     "dout_cmu_peric_shared0div20",
> +                                     "dout_cmu_peric_shared1div4_dmaclk";
>                 };
>
>                 sysreg_peric: system-controller@14030000 {
> @@ -522,13 +531,13 @@ clock_fsys0: clock-controller@15010000 {
>                         reg = <0x0 0x15010000 0x0 0x3000>;
>                         #clock-cells = <1>;
>                         clocks = <&fin_pll>,
> -                               <&clock_cmu DOUT_CMU_PLL_SHARED0_DIV6>,
> -                               <&clock_cmu DOUT_CMU_FSYS0_SHARED1DIV4>,
> -                               <&clock_cmu DOUT_CMU_FSYS0_SHARED0DIV4>;
> +                                <&clock_cmu DOUT_CMU_PLL_SHARED0_DIV6>,
> +                                <&clock_cmu DOUT_CMU_FSYS0_SHARED1DIV4>,
> +                                <&clock_cmu DOUT_CMU_FSYS0_SHARED0DIV4>;
>                         clock-names = "fin_pll",
> -                               "dout_cmu_pll_shared0_div6",
> -                               "dout_cmu_fsys0_shared1div4",
> -                               "dout_cmu_fsys0_shared0div4";
> +                                     "dout_cmu_pll_shared0_div6",
> +                                     "dout_cmu_fsys0_shared1div4",
> +                                     "dout_cmu_fsys0_shared0div4";
>                 };
>
>                 sysreg_fsys0: system-controller@15030000 {
> @@ -541,11 +550,11 @@ clock_fsys1: clock-controller@16810000 {
>                         reg = <0x0 0x16810000 0x0 0x3000>;
>                         #clock-cells = <1>;
>                         clocks = <&fin_pll>,
> -                               <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV8>,
> -                               <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV4>;
> +                                <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV8>,
> +                                <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV4>;
>                         clock-names = "fin_pll",
> -                               "dout_cmu_fsys1_shared0div8",
> -                               "dout_cmu_fsys1_shared0div4";
> +                                     "dout_cmu_fsys1_shared0div8",
> +                                     "dout_cmu_fsys1_shared0div4";
>                 };
>
>                 sysreg_fsys1: system-controller@16830000 {
> @@ -921,7 +930,7 @@ spi_0: spi@14140000 {
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         clocks = <&clock_peric PERIC_PCLK_SPI0>,
> -                               <&clock_peric PERIC_SCLK_SPI0>;
> +                                <&clock_peric PERIC_SCLK_SPI0>;
>                         clock-names = "spi", "spi_busclk0";
>                         samsung,spi-src-clk = <0>;
>                         pinctrl-names = "default";
> @@ -940,7 +949,7 @@ spi_1: spi@14150000 {
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         clocks = <&clock_peric PERIC_PCLK_SPI1>,
> -                               <&clock_peric PERIC_SCLK_SPI1>;
> +                                <&clock_peric PERIC_SCLK_SPI1>;
>                         clock-names = "spi", "spi_busclk0";
>                         samsung,spi-src-clk = <0>;
>                         pinctrl-names = "default";
> @@ -959,7 +968,7 @@ spi_2: spi@14160000 {
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         clocks = <&clock_peric PERIC_PCLK_SPI2>,
> -                               <&clock_peric PERIC_SCLK_SPI2>;
> +                                <&clock_peric PERIC_SCLK_SPI2>;
>                         clock-names = "spi", "spi_busclk0";
>                         samsung,spi-src-clk = <0>;
>                         pinctrl-names = "default";
> @@ -973,21 +982,21 @@ timer@10040000 {
>                         compatible = "tesla,fsd-mct", "samsung,exynos4210-mct";
>                         reg = <0x0 0x10040000 0x0 0x800>;
>                         interrupts = <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
> -                               <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
> +                                    <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
>                         clocks = <&fin_pll>, <&clock_imem IMEM_MCT_PCLK>;
>                         clock-names = "fin_pll", "mct";
>                 };
>
> --
> 2.53.0
>