Re: [PATCH v5 14/25] clk: mediatek: pllfh: Add configurable clock ops to mtk_pllfh_data
Brian Masney <[email protected]>
| Newsgroups | gmane.linux.drivers.devicetree,gmane.linux.kernel.clk,gmane.linux.kernel,gmane.linux.ports.arm.kernel,gmane.linux.ports.arm.mediatek,gmane.linux.network |
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| Message-ID | <[email protected]> |
On Sat, Aug 01, 2026 at 01:21:00PM +0200, Louis-Alexis Eyraud wrote: > Currently, the mtk_clk_register_pllfh functions always registers the > default PLL clock operation set (mtk_pllfh_ops). This does not allow > use a custom one, for SoC such as MT8189, that needs different > set with support for set/clr enable. > > Add a new field for the ops to register in mtk_pllfh_data structure > and use this new field to either register it when not null or the > default ops otherwise. > > Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud-ZGY8ohtN/[email protected]> Reviewed-by: Brian Masney <[email protected]>