Re: [PATCH 1/2] Add oprofile support for ARM Cortex A57 microarchitecture
Will Deacon <[email protected]>
| Newsgroups | gmane.linux.oprofile |
|---|---|
| Message-ID | <[email protected]> |
Hi Will, On Mon, Jul 21, 2014 at 08:29:19PM +0100, William Cohen wrote: > This patch adds the event list of the ARM Cortex A57 architecture. > > The patch is very straight forward: just add the model numbers and > type in the usual places and add the event list. > > Passes make check > > Signed-off-by: William Cohen <[email protected]> [...] > diff --git a/events/arm/armv8-ca57/events b/events/arm/armv8-ca57/events > new file mode 100644 > index 0000000..62974c1 > --- /dev/null > +++ b/events/arm/armv8-ca57/events > @@ -0,0 +1,67 @@ > +# > +# Copyright (c) Red Hat, 2014. > +# Contributed by William Cohen <[email protected]> > +# > +# ARM Cortex A57 events > +# From Cortex A57 TRM > +# > +include:arm/armv8-pmuv3-common > +event:0x40 um:zero minimum:10007 name:L1D_CACHE_LD : Level 1 data cache access - Read Curious, but how did you derive the minimum count value? Anyway, this patch looks fine to me: Reviewed-by: Will Deacon <[email protected]> Cheers, Will ------------------------------------------------------------------------------ Want fast and easy access to all the code in your enterprise? Index and search up to 200,000 lines of code with a free copy of Black Duck Code Sight - the same software that powers the world's largest code search on Ohloh, the Black Duck Open Hub! Try it now. http://p.sf.net/sfu/bds