Re: [PATCH 2/2] Add oprofile support for ARM Cortex A53 microarchitecture
Will Deacon <[email protected]>
| Newsgroups | gmane.linux.oprofile |
|---|---|
| Message-ID | <[email protected]> |
On Wed, Jul 23, 2014 at 04:39:32PM +0100, William Cohen wrote: > diff --git a/events/arm/armv8-ca53/events b/events/arm/armv8-ca53/events > new file mode 100644 > index 0000000..b5c171f > --- /dev/null > +++ b/events/arm/armv8-ca53/events > @@ -0,0 +1,13 @@ > +# > +# Copyright (c) Red Hat, 2014. > +# Contributed by William Cohen <[email protected]> > +# > +# ARM Cortex A53 events > +# From Cortex A53 TRM > +# > +include:arm/armv8-pmuv3-common > +event:0x60 um:zero minimum:10007 name:BUS_ACCESS_LD : Bus access - Read. Same question about the minimum count as I had for A57. I'm just curious :) > +event:0x61 um:zero minimum:10007 name:BUS_ACCESS_ST : Bus access - Write. > +event:0x7A um:zero minimum:10007 name:BR_INDIRECT_SPEC : Branch speculatively executed - Indirect branch. > +event:0x86 um:zero minimum:10007 name:EXC_IRQ : Exception taken, IRQ. > +event:0x87 um:zero minimum:10007 name:EXC_FIQ : Exception taken, FIQ. A53 has a bunch more events listed in the TRM, they just don't have catchy mnemonics. > diff --git a/events/arm/armv8-ca53/unit_masks b/events/arm/armv8-ca53/unit_masks > new file mode 100644 > index 0000000..5d69263 > --- /dev/null > +++ b/events/arm/armv8-ca53/unit_masks > @@ -0,0 +1,3 @@ > +# ARMv8 Cortex A57 unit masks s/A57/A53/ Will ------------------------------------------------------------------------------ Want fast and easy access to all the code in your enterprise? Index and search up to 200,000 lines of code with a free copy of Black Duck Code Sight - the same software that powers the world's largest code search on Ohloh, the Black Duck Open Hub! Try it now. http://p.sf.net/sfu/bds