Multiple definitions of INST_RETIRED for processors using i386/arch_perfmon

William Cohen <[email protected]>
Newsgroups gmane.linux.oprofile
Message-ID <[email protected]>
Hi Andi,

When testing oprofile Michael Petlan noticed there were a number of Intel architectures that include i386/arch_perfmon.  The Intel architected events set up INST_RETIRED with a unit mask of zero:

event:0xc0 counters:cpuid um:zero minimum:6000 filter:1 name:INST_RETIRED : number of instructions retired

The arch_perfmon/events is included in the following files:

$ grep include:i386/arch_perfmon */events
broadwell/events:include:i386/arch_perfmon
haswell/events:include:i386/arch_perfmon
ivybridge/events:include:i386/arch_perfmon
sandybridge/events:include:i386/arch_perfmon
silvermont/events:include:i386/arch_perfmon
westmere/events:include:i386/arch_perfmon

However, a number of Intel processor events files have have other unit masks being specific (1 or a bit mask or 1,2, and 4) for INST_RETIRED (0xc0):

$ grep 0xc0 */events |grep -v zero
atom/events:event:0xc0 counters:0,1 um:one minimum:6000 name:INST_RETIRED : number of instructions retired
broadwell/events:event:0xc0 counters:1 um:inst_retired minimum:2000003 name:inst_retired :
core_2/events:event:0xc0 counters:0,1 um:inst_retired minimum:6000 name:INST_RETIRED : number of instructions retired
haswell/events:event:0xc0 counters:1 um:one minimum:2000003 name:inst_retired_prec_dist :
nehalem/events:event:0xc0 counters:0,1,2,3 um:inst_retired minimum:6000 name:INST_RETIRED : number of instructions retired
sandybridge/events:event:0xc0 counters:1 um:one minimum:2000000 name:inst_retired : Instructions retired
westmere/events:event:0xc0 counters:0,1,2,3 um:inst_retired minimum:2000000 name:INST_RETIRED : Instructions retired (Programmable counter and Precise Event)

Notice that the broadwell, haswell, sandybridge, and westmere have multiple definitions of INST_RETIRED, one from arch_perfmon which has a zero unit mask and another one that has a non-zero unit masks.  How is the INST_RETIRED event suppose to work for processors that support the Intel architected performance events?  Always allow a unit mask of 0?  Any suggestions n how the testsuite lib/op_events.exp should properly exercise INST_RETIRED event to test that things are working?

-Will

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