[PATCH] DATA_CACHE_MISSES unit mask testsuite fix for AMD family15h

Michael Petlan <[email protected]>
Newsgroups gmane.linux.oprofile
Organization Red Hat
Message-ID <1427293393.3851.9.camel@Rudolf-RHEL-7>
The default unit mask for the event DATA_CACHE_MISSES  on AMD family 15h
CPUs is 0x1 instead of 0x0, which is common for other AMD CPUs. When the
"athlon" test event table is used on an AMD family 15h machine, the test
fails. A slightly modified event table for AMD family 15h has been added
in order to fix the issue.

Signed-off-by: Michael Petlan <[email protected]>
--

diff --git a/testsuite/lib/op_events.exp b/testsuite/lib/op_events.exp
index b71811c..c2e5f58 100644
--- a/testsuite/lib/op_events.exp
+++ b/testsuite/lib/op_events.exp
@@ -210,6 +210,18 @@ set op_event_table(athlon)                          \
        }                                           \
     }
 
+set op_event_table(amd_family15h)                          \
+    {                                               \
+       {                                           \
+            {0 CPU_CLK_UNHALTED  0 500000}         \
+            {1 DATA_CACHE_ACCESSES 0 500000}       \
+       }                                           \
+       {                                           \
+            {0 DATA_CACHE_ACCESSES   0 500000}     \
+            {1 DATA_CACHE_MISSES     1 500000}     \
+       }                                           \
+    }
+
 set op_event_table(p4)                              \                                                                                                                                                           
     {                                               \                                                                                                                                                           
        {                                           \                                                                                                                                                            
@@ -712,8 +724,8 @@ proc select_cpu_events {cpu_name} {                                                                                                                                                          
        x86-64/family14h {set type athlon}                                                                                                                                                                       
        AMD64_family14h {set type athlon}                                                                                                                                                                        
        65 {set type athlon}                                                                                                                                                                                     
-       x86-64/family15h {set type athlon}                                                                                                                                                                       
-       AMD64_family15h {set type athlon}                                                                                                                                                                        
+       x86-64/family15h {set type amd_family15h}                                                                                                                                                                
+       AMD64_family15h {set type amd_family15h}                                                                                                                                                                 
        66 {set type arch_perf}                                                                                                                                                                                  
        i386/westmere  {set type arch_perf}                                                                                                                                                                      
        Intel_Westmere_microarchitecture  {set type arch_perf}

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oprofile-tests__DATA_CACHE_MISSES_umask_fix_AMD_fam_15h.patch (text/x-patch, 1.4 KB)
diff --git a/testsuite/lib/op_events.exp b/testsuite/lib/op_events.exp
index b71811c..c2e5f58 100644
--- a/testsuite/lib/op_events.exp
+++ b/testsuite/lib/op_events.exp
@@ -210,6 +210,18 @@ set op_event_table(athlon)                          \
 	}                                           \
     }
 
+set op_event_table(amd_family15h)                          \
+    {                                               \
+	{                                           \
+	     {0 CPU_CLK_UNHALTED  0 500000}         \
+	     {1 DATA_CACHE_ACCESSES 0 500000}       \
+	}                                           \
+	{                                           \
+	     {0 DATA_CACHE_ACCESSES   0 500000}     \
+	     {1 DATA_CACHE_MISSES     1 500000}     \
+	}                                           \
+    }
+
 set op_event_table(p4)                              \
     {                                               \
 	{                                           \
@@ -712,8 +724,8 @@ proc select_cpu_events {cpu_name} {
 	x86-64/family14h {set type athlon}
 	AMD64_family14h {set type athlon}
 	65 {set type athlon}
-	x86-64/family15h {set type athlon}
-	AMD64_family15h {set type athlon}
+	x86-64/family15h {set type amd_family15h}
+	AMD64_family15h {set type amd_family15h}
 	66 {set type arch_perf}
 	i386/westmere  {set type arch_perf}
 	Intel_Westmere_microarchitecture  {set type arch_perf}
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