Re: [PATCH] Remove Powerpc OProfile events the kernel will reject

On Mon, 2015-11-16 at 17:38 -0500, William Cohen wrote:
> 
> Hi Carl,
> 
> So if I am reading the comment around line 326 the code is allowed to
> have the msb of cache_sel be 1 so long as the lower 3 bits are zero.
> Thus, 8 and 0 are allowed in for the cache_sel nibble and the
> currently proposed patch does exclude the problem pmu events.
> 

That is the way I read it.  When I tested the events with a cache field
of 8 were not rejected.  Unfortunately, I can't verify the accuracy of
the counts.  

Basically I took the entire events file (events/ppc64/power8/events),
ran some scripts on it to extract the event names for all of the events
that are not commented out.  The list of names were then put into a
script file to run each of the events on a simple workload to verify if
the events were accepted or rejected.  I claim that after the patch is
applied, all of the remaining events will be accepted as a valid event
by the kernel.  

I don't have the documentation on the HW bug to validate that the
comment in the code is accurate and the results of events with a cache
field of 8 really do work.  


> The libpfm4/lib/events/power8.h has:
> 
> * Documentation on the PMU events will be published at:
> *  http://www.power.org/documentation
> 
Yea, I tried the web site and the site doesn't seem to exist.  I sent
off an email to the IBM HW team to find out what is going on.  I will
let you know when I can track down a working link.  Thanks for noticing
the link is broken.

              Carl Love




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