RE: Dmesg info interpretation

-----Message d'origine-----
De : William Cohen [mailto:[email protected]] 
Envoyé : mardi 1 décembre 2015 16:11
À : Patrick AGRAIN; [email protected]
Objet : Re: Dmesg info interpretation

On 12/01/2015 09:23 AM, Patrick AGRAIN wrote:
> 
> 
> -----Message d'origine-----
> De : William Cohen [mailto:[email protected]] Envoyé : mardi 1 
> décembre 2015 15:17 À : Patrick AGRAIN; 
> [email protected]
> Objet : Re: Dmesg info interpretation
> 
> On 12/01/2015 04:15 AM, Patrick AGRAIN wrote:
>> Hello all,
>>  
>> Please forgive me in advance for this (meaby) newbie-like question, but as I'm new in this topic, I wish to clarify some vocabulary.
>>  
>> From _https://perf.wiki.kernel.org/index.php/Tutorial_, I saw that they give following example:
>> *Processor * 	*Generic counters * 	*Fixed counters *
>> Intel Core 	2 	3
>> Intel Nehalem 	4 	3
>>
>> Referring the dmesg output of my system :
>> <...>
>> CPU0: Intel(R) Pentium(R) CPU G3220 @ 3.00GHz stepping 03 Performance
>> Events: no PEBS fmt2+, generic architected perfmon, Intel PMU driver.
>> ... version:                3
>> ... bit width:              48
>> ... generic registers:      8
>> ... value mask:             0000ffffffffffff
>> ... max period:             000000007fffffff
>> ... fixed-purpose events:   3
>> ... event mask:             00000007000000ff
>> Brought up 1 CPUs
>> <...>
>> Would it be correct to write that my system:
>>
>>   * Has 8 generic counters.
>>   * Has 3 fixed counters.
>>   * Counters are 48-bits wide.
>>
>> Thanks to correct me if I'm wrong.
>> Kind regards,
>> Patrick Agrain
> 
> Hi Patrick,
> 
> A number of the Intel processors allow two logical processors on a physical processor.  In these cases perf give each logical processor half the pmu counters.  Thus, rather than 8 counters per CPU there are 4 counters available.  You can check this by looking for "ht" in the "flags:" line of the /proc/info output.  Looking at the Intel Penium CPUG3220 information at http://ark.intel.com/products/77773/Intel-Pentium-Processor-G3220-3M-Cache-3_00-GHz , it has two physical cores and two threads, so it doesn't look like it does the threading.  Perf shouldn't have to split the pmu counters between logical processors if there is no hyperthreading.
> 
> -Will
> 
> Thank you Will,
> 
> Actually we only enable one core.
> Does it mean that we get only 4 generic counters ?
> 
> This is the cpuinfo for this system:
> [root@x3250-m5 tmpd]# cat /proc/cpuinfo
> processor       : 0
> vendor_id       : GenuineIntel
> cpu family      : 6
> model           : 60
> model name      : Intel(R) Pentium(R) CPU G3220 @ 3.00GHz
> stepping        : 3
> cpu MHz         : 2992.946
> cache size      : 3072 KB
> physical id     : 0
> siblings        : 1
> core id         : 0
> cpu cores       : 1
> apicid          : 0
> initial apicid  : 0
> fdiv_bug        : no
> hlt_bug         : no
> f00f_bug        : no
> coma_bug        : no
> fpu             : yes
> fpu_exception   : yes
> cpuid level     : 13
> wp              : yes
> flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx pdpe1gb rdtscp lm constant_tsc up arch_perfmon pebs bts xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 movbe popcnt xsave rdrand lahf_lm abm arat epb xsaveopt pln pts dts tpr_shadow vnmi flexpriority ept vpid fsgsbase erms
> bogomips        : 5985.89
> clflush size    : 64
> cache_alignment : 64
> address sizes   : 39 bits physical, 48 bits virtual
> power management:
> 
> Regards,
> Patrick

Hi Patrick,

I expect that you should have 8 general registers available without hyperthreading.  On a laptop running linux 3.10.0-327.el7.x86_64 I have that has hyperthreading enabled I got:


[    0.033164] Performance Events: PEBS fmt1+, 16-deep LBR, IvyBridge events, full-width counters, Intel PMU driver.
[    0.033181] ... version:                3
[    0.033182] ... bit width:              48
[    0.033182] ... generic registers:      4
[    0.033183] ... value mask:             0000ffffffffffff
[    0.033184] ... max period:             0000ffffffffffff
[    0.033185] ... fixed-purpose events:   3
[    0.033186] ... event mask:             000000070000000f
[    0.048008] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.

When hyperthreading was disabled:


[    0.033104] Performance Events: PEBS fmt1+, 16-deep LBR, IvyBridge events, full-width counters, Intel PMU driver.
[    0.033122] ... version:                3
[    0.033122] ... bit width:              48
[    0.033123] ... generic registers:      8
[    0.033124] ... value mask:             0000ffffffffffff
[    0.033125] ... max period:             0000ffffffffffff
[    0.033125] ... fixed-purpose events:   3
[    0.033126] ... event mask:             00000007000000ff
[    0.047819] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.

-Will


Will,
OK, as soon as I have access to the machine, I will perform the same test.
Thanks for pointing that out.

Best regards,
Patrick

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