Re: HPCs for DRAM

Michael Petlan <[email protected]>
Newsgroups gmane.linux.oprofile
Message-ID <alpine.LRH.2.20.1606201727480.5594@Diego>
Hi Dimitris,

On Sat, 18 Jun 2016, Dimitris Ganosis wrote:
> PS. The ideal would be to distinguish memory bandwidth and memory capacity
> like MEMORY_BW_READS
> <https://yunmingzhang.wordpress.com/2015/07/22/measure-memory-bandwidth-using-uncore-counters/>
> but it's not available, at least with this name, in my machine.

The attached program should detect whether your CPU supports MBM or not.
However, if it is a Nehalem (model = 26, 30 or 46) or similar, it does
not for sure.

>
> On 18 June 2016 at 15:29, Dimitris Ganosis <[email protected]>
> wrote:
>
>> I run an Intel(R) Xeon(R) CPU E5520 @ 2.27GHz and follow, apart from perf

What are the family number and model number (lscpu, cat /proc/cpuinfo, ...)?

>> list, this list
>> <http://oprofile.sourceforge.net/docs/intel-corei7-events.php>for the
>> available counters.
>> Based on Linux perf events Event Sources
>> <http://www.brendangregg.com/perf.html> I expected that counters like
>>
>> MEM_STORE_RETIRED and MEM_LOAD_RETIRED
>>
>> would capture only DRAM's activity. I mean that if I don't use DRAM it's
>> bizarre to me to see these counters have the same trend with CPI and other
>> cpu counters. I run a cpu intensive benchmark which does not use DRAM, as I
>> could see from htop, and these two counters followed the same trend, in the
>> graph that I created later, with almost all the other counters. So, my
>> question is if there are any counters which are "triggered" only when I use
>> DRAM?
>> Like the IO_TRANSACTIONS which is triggered only when I have I/Os.
>> Thank you!

Could you provide more details? How could I reproduce that?

>>
>

Michael

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intel_cqm_detect.c (text/plain, 1.9 KB)
#include <stdlib.h>
#include <stdio.h>
#include <string.h>

typedef struct {
	unsigned eax, ebx, ecx, edx;
} cpuid_data;

static inline void cpuid(int func_eax, int func_ecx, cpuid_data * p)
{
	asm("cpuid"
	    : "=a" (p->eax), "=b" (p->ebx), "=c" (p->ecx), "=d" (p->edx)
	    : "a" (func_eax), "c" (func_ecx));
}

static inline void runit(unsigned int fa, unsigned int fc, cpuid_data *x)
{
	cpuid(fa, fc, x);
	printf("0x%08x 0x%08x :: eax=0x%08x ebx=0x%08x ecx=0x%08x edx=0x%08x\n", fa, fc, x->eax, x->ebx, x->ecx, x->edx);
}


int main(int argc, char *argv[])
{
	unsigned int *v;
	cpuid_data x;


	/* check for max_leaf */
	runit(0x0, 0x0, &x);
	if(x.eax <= 7)
	{
		printf("\tMaxLeaf too small. Sorry.\n");
		return 1;
	}
	else
		printf("\tMaxLeaf is OK (%i).\n\n", x.eax);


	/* check for the EBX.PQM bit */
	runit(0x7, 0x0, &x);
	if(x.ebx & 0x1000)
		printf("\tEBX.PQM bit is set.\n\n");
	else
	{
		printf("\tEBX.PQM bit is NOT set. Sorry.\n");
		return 1;		
	}


	/* check for available resources */

	/* check for L3 CMT */
	runit(0xf, 0x0, &x);
	if(x.edx & 0x2)
	{
		printf("\tEDX.L3 bit is set.\n\n");

                /* check details about L3 CMT */
		runit(0xf, 0x1, &x);
		printf("\tHighest possible RMID = %i\n", x.ecx);
		printf("\tCounter multiplier = %i\n", x.ebx);
		printf("\tEventID lookup bit vector = 0x%08x\n", x.edx);
		printf("\t\tL3 occupancy %ssupported\n", (x.edx & 0x01)? "" : "NOT ");
		printf("\t\tL3 total bandwidth (MBM) %ssupported\n", (x.edx & 0x02)? "" : "NOT ");
		printf("\t\tL3 local bandwidth (MBM) %ssupported\n", (x.edx & 0x04)? "" : "NOT ");
        }
	else
		printf("\tEDX.L3 bit is NOT set.\n\n");


	/* here should be additional resources */
	/*
	        there are no additional resources known now
	        bits 31:2 in edx are reserved for future use
	*/

	return 0;
}
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