RE: oprofile support for PPC_E5500
"Beaman, Thomas" <[email protected]>
| Newsgroups | gmane.linux.oprofile |
|---|---|
| Message-ID | <1302F7310B9ED04A864E1F2C0AA459BB2A6EB867@USA7109MB003.na.xerox.net> |
> -----Original Message----- > From: Michael Petlan [mailto:[email protected]] > Sent: Friday, July 08, 2016 1:16 PM > To: Beaman, Thomas > Cc: Michael Petlan; William Cohen; [email protected] > Subject: RE: oprofile support for PPC_E5500 > > On Fri, 8 Jul 2016, Beaman, Thomas wrote: > > Hi Michael, > > > > Hi Tom, > > > I wanted to update you on my status. I was able to apply your patch, but I > did notice a few recommendations for change. > > > > The E5500 is a 64 bit cpu like the E6500. I have noticed that the E6500 has > entries in both the ppc and ppc64 directories. Also the op_cpu_type.c file > has two entries ppc/e6500 and ppc64/e6500. I believe the e5500 should also > be like this. > > I don't see any ppc64/e6500 dir. Do you have the same git tree? > https://sourceforge.net/p/oprofile/oprofile/ci/master/tree/events/ppc64/ I did some looking into this, and I have oprofile version 1.1.0 but my linux vendor (WindRiver linux) does add a patch called oprofile-wr-add-ppc64-e6500-support.patch which adds entries to the ppc64 event dir and updates the op_cpu_type.c file with a ppc64/e6500 entry. (very similar type of updates as your patch) > > [Michael@Diego oprofile]$ ls events/ppc64 events/ppc > events/ppc: > 7450 e300 e500 e500mc e500v2 e5500 e6500 > events/ppc64: > 970 970MP architected_events_v1 power4 power5 power5+ power5++ > power6 power7 power8 > > The same with op_cpu_type.c: > > [Michael@Diego oprofile]$ grep -P -i ppc6?4?/e6500 ./libop/op_cpu_type.c > { "e6500", "ppc/e6500", CPU_PPC_E6500, 6 }, > > Anyway, it should not matter whether the events/unit_masks files are in ppc > or ppc64 dir, as you can see, Intel datafiles are in i386 dir while AMD files are > in x86-64, no matter that Intel CPUs run in 64bit mode now. Regarding to the > ppc/ppc64, you can see that ppc64 dir contains IBM POWER processors, while > ppc is for the others. > What you say is probably correct for intel, but from actual testing this does not appear to be the case for PowerPC. If I do not have the ppc64/e5500 entries the cpu is NOT detected. This is probably why Windriver has added the ppc64/e6500 patch. > > > > After applying your patch I made the following changes by hand. > > > > Add ppc64/e5500 event and unit_masks (with includes pointing to > > ppc64/e6500) Add ppc64/e5500 entry to op_cpu_type.c Fix typo in > > ppc/unit_masks include:ppc/6500 should be include:ppc/e6500 > Yes, I haven't noticed the typo. Thanks. > > > > > After these changes I am now able to run ophelp and it list lots of info, so it > is now detecting the cpu. > > The command `ophelp -r` should print the processor type If ophelp is > reporting events, it is good news. > root@miopqt_250:~# ophelp -r e5500 but I can only get this if I have ppc64/e5500 entries in op_cpu_type.c and the ppc64/e5500 directory. > > > > I tried running your check_events.sh script but was running into problems. > I am off until Monday but I wanted to give you a status update. If you want > to modify the patch I can test a new one on Monday and also figure out what > is going on with check_events. > > The script just parses all the supported events from ophelp and then it runs > `ocount -b -e $event -- sleep 0.2` against each of them. > > There's no E5500 or any other similar CPU available for me, just an IBM > POWER7 box and I have no problems running the script there. > > You may try it manually: > > perl -ne 'print "$1\n" if /name:(\w+)\s/' < events/ppc/e6500/events > > events.list for i in `cat events.list`; do > ocount -b -e $i -- sleep 0.2 >> result.log done > The problem with the script is my system would not accept sleep 0.2. I have changed it to sleep 1 and now it is working. I have attached the output files events.list, results.log and supported.list > > > > I do not know the posting protocol, should I be posting this reply to the > oprofile-list or is direct communications acceptable ? If it should go to the list > can you forward it on and let me know for future postings. > > It's always better when the messages go to the list, since other people might > find them useful later on. > > > > > Thanks for your help so far, > > Tom > > Michael > > > > > > > > > > > -----Original Message----- > > From: Michael Petlan [mailto:[email protected]] > > Sent: Thursday, July 07, 2016 10:48 AM > > To: Beaman, Thomas > > Cc: [email protected] > > Subject: Re: oprofile support for PPC_E5500 > > > > Hi, > > > > could you please test the attached patch? > > > > E6500 also has the same PMU events as E500mc plus some more. > > It would be good to know what the set of events supported by the E5500 > actually is. > > > > Please run the oprofile-tests testsuite and the attached test and send the > logs from the second one? > > > > Anyway, it would be nice if someone more appropriate reviewed the > events and checks the kernel support, etc. > > > > Thanks. > > Michael > > > > > > On Wed, 6 Jul 2016, Beaman, Thomas wrote: > >> When I am running on my PPC E5500 system oprofile cannot detect the > >> CPU > >> > >> > >> > >> operf --version > >> > >> Unable to obtain cpu_type > >> > >> > >> > >> Looking at op_cpu_type.h I see entries for > >> > >> > >> > >> CPU_PPC_E500MC, /**< e500mc */ > >> > >> CPU_PPC_E6500, /**< e6500 */ > >> > >> > >> > >> But no entry for the PPC E5500. The E5500 is very similar to e500mc and > the E6500. Can support be added for this processor ? > >> > >> > >> > >> Thanks, > >> > >> Tom > >> > >> > >> > >> > >> > >> > >> > > ------------------------------------------------------------------------------ Attend Shape: An AT&T Tech Expo July 15-16. Meet us at AT&T Park in San Francisco, CA to explore cutting-edge tech and listen to tech luminaries present their vision of the future. This family event has something for everyone, including kids. Get more information and register today. http://sdm.link/attshape _______________________________________________ oprofile-list mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/oprofile-list
events.list
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results.log
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CPU_CLK,2984306,100.00 COMPLETED_INSNS,1130959,100.00 COMPLETED_OPS,1135423,100.00 DECODED_OPS,1304811,100.00 TRANSITIONS_PM_EVENT,0,100.00 CPU_CLK_PM_EVENT,0,100.00 COMPLETED_BRANCHES,175908,100.00 COMPLETED_LOAD_OPS,249220,100.00 COMPLETED_STORE_OPS,169707,100.00 COMPLETION_REDIRECTS,1129,100.00 BRANCHES_FINISHED,180375,100.00 TAKEN_BRANCHES_FINISHED,103925,100.00 TAKEN_BRANCHES_FINISHED_NOT_BTB,8034,100.00 BRANCHES_MISPREDICTED,14610,100.00 BRANCHES_MISPREDICTED_DIRECTION,19736,100.00 BTB_HITS,168359,100.00 DECODE_STALLED,1787049,100.00 ISSUE_STALLED,898116,100.00 BRANCH_ISSUE_STALLED,589162,100.00 SFX0_SCHEDULE_STALLED,953522,100.00 SFX1_SCHEDULE_STALLED,779347,100.00 CFX_SCHEDULE_STALLED,202428,100.00 LSU_SCHEDULE_STALLED,653489,100.00 BU_SCHEDULE_STALLED,856163,100.00 TOTAL_TRANSLATED,439486,100.00 LOADS_TRANSLATED,261629,100.00 STORES_TRANSLATED,166667,100.00 TOUCHES_TRANSLATED,778,100.00 CACHEOPS_TRANSLATED,1550,100.00 CACHEINHIBITED_ACCESSES_TRANSLATED,0,100.00 GUARDED_LOADS_TRANSLATED,0,100.00 WRITETHROUGH_STORES_TRANSLATED,0,100.00 MISALIGNED_ACCESSES_TRANSLATED,56,100.00 FETCH_2X4_HITS,18078,100.00 FETCH_HITS_ON_PREFETCHES,14411,100.00 GENERATED_FETCH_PREFETCHES,3158,100.00 DL1_RELOADS,18240,100.00 LOAD_MISS_WITH_LOAD_QUEUE_FULL,83,100.00 LOAD_GUARDED_MISS_NOT_LAST_REPLAYS,139,100.00 STORE_TRANSLATED_QUEUE_FULL_REPLAYS,2270,100.00 ADDRESS_COLLISION_REPLAYS,9279,100.00 DTLB_MISS_REPLAYS,1873,100.00 DTLB_BUSY_REPLAYS,21,100.00 SECOND_PART_MISALIGNED_AFTER_MISS_REPLAYS,10,100.00 LOAD_MISS_QUEUE_FULL_CYCLES,45,100.00 LOAD_GUARDED_MISS_NOT_LAST_CYCLES,1255,100.00 STORE_TRANSLATED_QUEUE_FULL_CYCLES,26578,100.00 ADDRESS_COLLISION_CYCLES,24930,100.00 DTLB_MISS_CYCLES,5922,100.00 DTLB_BUSY_CYCLES,41,100.00 SECOND_PART_MISALIGNED_AFTER_MISS_CYCLES,30,100.00 IL1_FETCH_RELOADS,11714,100.00 FETCHES,426619,100.00 IMMU_TLB4K_RELOADS,117,100.00 IMMU_VSP_RELOADS,0,100.00 DMMU_TLB4K_RELOADS,378,100.00 DMMU_VSP_RELOADS,0,100.00 L2MMU_MISSES,467,100.00 TAKEN_BRANCHES,32064,100.00 TAKEN_BLR,19945,100.00 BTB_TARGET_MISPREDICT,25200,100.00 MISPREDICT_TARGET_BLR,0,100.00 TAKEN_BTB_BUT_MISS,0,100.00 PMC0_OVERFLOW,0,100.00 PMC1_OVERFLOW,0,100.00 PMC2_OVERFLOW,0,100.00 PMC3_OVERFLOW,0,100.00 INTERRUPTS,505,100.00 EXTERNAL_INTERRUPTS,0,100.00 CRITICAL_INTERRUPTS,0,100.00 SC_TRAP_INTERRUPTS,24,100.00 TBL_BIT_TRANS_PMGC0,39731,100.00 PMC4_OVERFLOW,0,100.00 PMC5_OVERFLOW,0,100.00 L1_STASH_HIT,0,100.00 L1_STASH_REQ,0,100.00 TIMES_LSU_THREAD_PRIO_SWTICHED,0,100.00 CLK_THREAD_REQ_FPU_DENIED,0,100.00 CLK_THREAD_REQ_VPERM_DENIED,0,100.00 CLK_THREAD_REQ_VGEN_DENIED,0,100.00 CLK_THREAD_REQ_CFX_DENIED,0,100.00 CLK_THREAD_REQ_FETCH_DENIED,0,100.00 CLK_LSU_ISSUE_STALLED,55441,100.00 CLK_FPU_ISSUE_STALLED,14307,100.00 CLK_ALTIVEC_ISSUE_STALLED,17440,100.00 CLK_FPU_SCHEDULE_STALLED,4497,100.00 CLK_VPERM_SCHEDULE_STALLED,14406,100.00 CLK_VGEN_SCHEDULE_STALLED,7540,100.00 CLK_VPU_INSTRUCTION_WAIT_FOR_OPERA,20253,100.00 CLK_VFPU_INSTRUCTION_WAIT_FOR_OPERA,15210,100.00 CLK_VSFX_INSTRUCTION_WAIT_FOR_OPERA,6374,100.00 CLK_VCFX_INSTRUCTION_WAIT_FOR_OPERA,4992,100.00 CLK_IB_EMPT,6223,100.00 CLK_IB_FULL,60,100.00 CLK_CB_EMPT,1571,100.00 CLK_CB_FULL,0,100.00 CLK_PRESYNC_SI_IB,0,100.00 COMPLETED_CLK_0_INSTRUCTIONS,2412,100.00 COMPLETED_CLK_1_INSTRUCTIONS,36,100.00 COMPLETED_CLK_2_INSTRUCTIONS,33,100.00 DETECTED_IAC5S,0,100.00 DETECTED_IAC6S,0,100.00 DETECTED_IAC7S,0,100.00 DETECTED_IAC8S,0,100.00 DETECTED_IAC1S,0,100.00 DETECTED_IAC2S,0,100.00 DETECTED_IAC3S,0,100.00 DETECTED_IAC4S,0,100.00 DETECTED_DAC1S,0,100.00 DETECTED_DAC2S,0,100.00 DETECTED_DVT0,0,100.00 DETECTED_DVT1,0,100.00 DETECTED_DVT2,0,100.00 DETECTED_DVT3,0,100.00 DETECTED_DVT4,0,100.00 DETECTED_DVT5,0,100.00 DETECTED_DVT6,0,100.00 DETECTED_DVT7,0,100.00 CLK_COMPLETION_STALLED,0,100.00 FPU_FINISH,1,100.00 CLK_FPU_DIV,0,100.00 FPU_DENORM_INPUT,0,100.00 FPU_DENORM_OUTPUT,0,100.00 FPU_FPSCR_FULL_STALL,0,100.00 FPU_PIPE_SYNC_STALL,0,100.00 FPU_INPUT_DATA_STALL,3,100.00 FPU_INSTRUCTIONS_GEN_FLAG,0,100.00 PW20_CNT,0,100.00 DECORATED_LOADS,0,100.00 DECORATED_STORES,0,100.00 NUM_INSTRUCTIONS_SUCC,3615,100.00 NUM_INSTRUCTIONS_UNSUCC,119,100.00 COMPLETED_LSU_MICROOPS,0,100.00 COMPLETED_GPR_LOADS,0,100.00 COMPLETED_GPR_STORES,0,100.00 COMPLETED_CACHEOPS,0,100.00 COMPLETED_MEM_BARRIERS,0,100.00 COMPLETED_SFX_MICROOPS,0,100.00 COMPLETED_SINCLK_SFX_MICROOPS,0,100.00 COMPLETED_DBLCLK_SFX_MICROOPS,0,100.00 COMPLETED_CFX_INSTRUCTIONS,0,100.00 COMPLETED_SFX_CFX_INSTRUCTIONS,0,100.00 COMPLETED_FPU_INSTRUCTIONS,0,100.00 COMPLETED_FPR_MICROOPS_LOADS,0,100.00 COMPLETED_FPR_MICROOPS_STORES,0,100.00 COMPLETED_FPR_MICROOPS_LOADS_STORES,0,100.00 COMPLETED_FPR_SINPRECISE_LOADS_STORES,0,100.00 COMPLETED_FPR_DBLPRECISE_LOADS_STORES,0,100.00 COMPLETED_ALTIVEC_INSTRUCTIONS,0,100.00 COMPLETED_ALTIVEC_VSFX_INSTRUCTIONS,0,100.00 COMPLETED_ALTIVEC_VCFX_INSTRUCTIONS,0,100.00 COMPLETED_ALTIVEC_VPU_INSTRUCTIONS,0,100.00 COMPLETED_ALTIVEC_VFPU_INSTRUCTIONS,0,100.00 COMPLETED_VR_LOADS_MICROOPS,0,100.00 COMPLETED_VR_STORES_MICROOPS,0,100.00 VSCR_SAT_SET,0,100.00 CLK_SFX0_IDLE,0,100.00 CLK_SFX1_IDLE,0,100.00 CLK_CFX_IDLE,0,100.00 CLK_LSU_IDLE,0,100.00 CLK_BU_IDLE,0,100.00 CLK_FPU_IDLE,0,100.00 CLK_VPU_IDLE,0,100.00 CLK_VFPU_IDLE,0,100.00 CLK_VSFX_IDLE,0,100.00 CLK_VCFX_IDLE,0,100.00 L1_CACHE_MISSES,0,100.00 L1_CACHE_LOAD_MISSES,0,100.00 L1_CACHE_STORE_MISSES,0,100.00 LMQ_ALLOCATED_LOADS,0,100.00 LOAD_THREAD_MISS_COLLISION,0,100.00 INTERTHREAD_STATUS_ARRAY_COLLISION,0,100.00 NUM_SGB_ALLOC,0,100.00 NUM_SGB_GATHERS,0,100.00 NUM_SGB_OVERFLOWS,0,100.00 NUM_SGB_PROMOTIONS,0,100.00 NUM_SGB_INORDER_PROMOTIONS,0,100.00 NUM_SGB_OUTOFORDER_PROMOTIONS,0,100.00 NUM_SGB_HP_PROMOTIONS,0,100.00 NUM_SGB_MISO_PROMOTIONS,0,100.00 NUM_SGB_WATERMARK_PROMOTIONS,0,100.00 NUM_SGB_OVERFLOW_PROMOTIONS,0,100.00 CLK_DLAQ_FULL,0,100.00 TIMES_DLAQ_FULL,0,100.00 CLK_LRSAQ_FULL,0,100.00 TIMES_LRSAQ_FULL,0,100.00 CLK_FWDAQ_FULL,0,100.00 TIMES_FWDAQ_FULL,0,100.00 NUM_FWD_STQ_COLLISION_TIMES,0,100.00 NUM_FWD_STQ_COLLISION_TIMES_DATA_RDY,0,100.00 NUM_FWD_STQ_COLLISION_TIMES_DATA_NORDY,0,100.00 NUM_NOFWD_STQ_COLLISION_TIMES,0,100.00 NUM_FWD_STQ_COLLISION_CLK,0,100.00 NUM_FWD_STQ_COLLISION_CLK_DATA_RDY,0,100.00 NUM_FWD_STQ_COLLISION_CLK_DATA_NORDY,0,100.00 NUM_NOFWD_STQ_COLLISION_CLK,0,100.00 NUM_FALSE_EA_COLLISION,0,100.00 NUM_LSO_BUS_COLLISION,0,100.00 NUM_INTERTHREAD_DBLWORKD_BANK_COLLISION,0,100.00 L1_CACHE_IM,0,100.00 L2MMU_MISSES,472,100.00
supported.list
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