patch-2.6.13-rc7-ds1

Deepak Saxena <[email protected]> Wed, 24 Aug 2005 00:19:55 -0700
Newsgroups gmane.linux.ports.arm.announce
Organization Plexity Networks
Message-ID <[email protected]>
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ftp://source.mvista.com/dsaxena/patches/2.6/patch-2.6.13-rc7-ds1.gz
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The above patch adds initial support for Intel's IXP2350 NPU, IXDP2351 board, 
and the XScale-3 (XSC3) core to the Linux kernel.

After applying the patch:

make ixdp2351_defconfig && make zImage

In redoot:

load -r -v -b 0x01008000 zImage
exec 

For those that know nothing about it, the IXP2350 is a follow-on to the
IXP2[48]00 chips that has some new features, primarally the use of
the new Intel XSC3 core. The XCS3 core is an ARMv5 instruction set
core with some portions of the v6 MMU and cache capabilities such as
super-sections (16MB pages), 36-bit addressing, L2 cache, and 
cache-coherence via shared pages.

Please note that this patch is an extreme work in progress and the
only thing I've really tested/implemented so far is being able to
NFS boot over the on-board CS89x0 on the IXDP2351 board.  Following 
is a TODO list for this port so that people have an idea of what still 
needs to be added.  I'm currently working on PCI support , but that requires 
a few baby steps first such as being able to ioremap() 36-bit addresseable 
memory using supersections. I'm also going on vacation next week, so
don't expect any real progress until I return.

- Cache features:

  + Cache-coherent operation support. This requires adding code to
    enable the S bit on all the system memory page tables and then
    make the DMA API call the cpu_dma_* functions only if coherency 
    is disabled. 

- MMU features:
 
  + ioremap() using 16MB supersections. While at it, add support for 
    ioremap() using 1MB sections.

  + ioremap() of 36-bit addressed I/O (requires above)

  + Provide method of mapping 36-bit I/O with supersections into 
    user space.

- Above two should be written to work on both the XSC3 core and ARMv6 cores 
  that support these features as they are identical.

- Drivers:

  + PCI support (requires 36-bit ioremap support)

  + Watchdog (Trivial, same as IXP4xx)

  + I2C (Trivial, same as IXP4xx and just port from existing 2.4)

  + MTD (Trivial, port existing 2.4)

- Cleanup/optimization

  + Get rid of uneeded constants (for example...SDRAM controller bits)

  + Get rid of extra interrupt handling level for PCIA and PCIB

  + Make IRQ names consistent with existing IXP2000 code

  + Cleanup memory map

  + Merge IXP23xx and IXP2x00 code into one directory. This one is a 
    maybe. I just don't like having mach-ixp23xx and mach-ixp2000.
    It is very confusing. Merging them would require renaming all
    the ixp2000 macros/functions/etc ixp2x00. The other option is
    to rename mach-ixp2000 mach-ixp2x00. Thoughts?

  + Provide device-model hooks to use Lennert's uengine loader driver
    across all IXPs.

  + Rewrite CS89x0 driver. While not absolutely needed to get this board
    working (it works now), this driver really needs rewriting. See
    http://marc.theaimsgroup.com/?l=linux-netdev&m=112478611913509&w=2.

  + Lots of other little cleanups along the way

Also note that I have not tested this with the Intel drivers. I cannot 
do so b/c they do not exist on 2.6. Please DO NOT email me or this mailing
list asking when they will be available on 2.6. Instead, please go
bug your Intel representative and tell them that you want 2.6 support.

I'd like to thank MontaVista for funding this work and the following people
from Intel (or ex-) for providing intial starting code and ideas.

Matthew Gilbert
Niranjan Ghate
Dave Jiang
Andrzej Mialkowski

Also a big thanks to Lennert Buytenhek for implementing the open source
uEngine driver and listening to me complain a lot on IRC. :)

As always, comments, flames, patches are always welcome.

Enjoy,
~Deepak

-- 
Deepak Saxena - [email protected] - http://www.plexity.net

Even a stopped clock gives the right time twice a day.

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