Re: [RFC v2 PATCH 0/16] Optimize this_cpu_*() ops for non-x86 (ARM64 for this series)
"Christoph Lameter (Ampere)" <[email protected]> Tue, 4 Aug 2026 14:40:27 -0700 (PDT)
| Newsgroups | gmane.linux.kernel,gmane.linux.kernel.mm,gmane.linux.ports.arm.kernel |
|---|---|
| Message-ID | <[email protected]> |
On Tue, 4 Aug 2026, Lorenzo Stoakes (ARM) wrote: > On Tue, Aug 04, 2026 at 10:01:45AM -0700, Linus Torvalds wrote: > > So I'm just trying to clarify my stance - I don't hate percpu TLB > > contents per se. I hate the notion of codifying them. > > I do worry that changing per-CPU data structures to support this is exactly > codifying this (and will encourage other arches to follow suit). > > And I really don't think there's any way to implement this without > fundamentally changing core mm or assumptions that core mm can make. Would it be possible to discuss the technical issues instead of throwing up this and that foggy objection? Lets not get into the complexities of restarting a critical section from an interrupt handler that you are proposing but lets just look at the code generated for this_cpu_* operations: The fundamental problem is that your patchset does <preeamble establishing restart point> RMV per cpu op <post handling cleaning up setup of restart point> What x86 does and what we can get ARM to do is: RMW per cpu op Why do you think that your solution that requires a complex restart mechanism is better? These are operations that are key to the performance in critical parts of memory management and this code is replicated by being inlined thousands of times in the kernel.