[PATCH v33 6/7] arm64: dts: imx8ulp: add secure enclave node
[email protected] Wed, 05 Aug 2026 14:14:52 +0530
| Newsgroups | gmane.linux.documentation,gmane.linux.kernel,gmane.linux.drivers.devicetree,gmane.linux.ports.arm.kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Pankaj Gupta <[email protected]> Add the EdgeLock Enclave (ELE) secure-enclave node to the i.MX8ULP SoC dtsi, together with a label for sram@2201f000 that the node references. Keep the node disabled in the SoC dtsi so it does not impose a reserved-memory requirement on every board. Boards enable the enclave and provide its memory-region by including imx8ulp-firmware.dtsi. Signed-off-by: Pankaj Gupta <[email protected]> Reviewed-by: Frank Li <[email protected]> --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index c6d1bb9edf38..38233dd74ee3 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright 2021 NXP + * Copyright 2021, 2025 NXP */ #include <dt-bindings/clock/imx8ulp-clock.h> @@ -153,7 +153,7 @@ sosc: clock-sosc { #clock-cells = <0>; }; - sram@2201f000 { + sram0: sram@2201f000 { compatible = "mmio-sram"; reg = <0x0 0x2201f000 0x0 0x1000>; @@ -185,6 +185,14 @@ scmi_sensor: protocol@15 { #thermal-sensor-cells = <1>; }; }; + + hsm0: secure-enclave { + compatible = "fsl,imx8ulp-se-ele-hsm"; + mbox-names = "tx", "rx"; + mboxes = <&s4muap 0 0>, <&s4muap 1 0>; + sram = <&sram0>; + status = "disabled"; + }; }; cm33: remoteproc-cm33 { -- 2.43.0