Re: [PATCH] fix SMP TLB optimisations

> Because this is non-PIC code the save/restore of r19 has been turned
> into a NOP.

Why a NOP?  Wouldn't a newline be ok?

> > It could be replaced by a mtsp instruction:
> >
> >         mtsp %r0,%sr2
> >
> > This would ensure that sr2 is always set correctly for the branch to
> > the gateway page.
> 
> ... only for people with a recent enough glibc.

Sure!  However, I thought I saw people requesting new syscalls, etc ;)

> > Don't like what's going on with fr22 in the above code.  Seems like a
> > GCC optimization bug since it looks like there are a few general registers
> > that could be used.
> 
> Why a bug? It's a register just like any other.

It's an optimization bug because copying from a general to a floating
register has to be done through memory.  A stack local would save
a read and write.  In this case, all the manipulation is done before
the syscall and there would appear to be sufficient general registers
available to do the job.  GCC's register allocator should be smart
enough to figure this out...

I haven't studied this in detail but GCC on the PA allocates floating
registers first.  It's claimed in the code that this results in better
code.  This allocation scheme was probably based on work done at Utah
in the early 90's.  So, things may have changed.

Dave
-- 
J. David Anglin                                  [email protected]
National Research Council of Canada              (613) 990-0752 (FAX: 952-6602)