[PATCH 1/2] MIPS: Fix a R10000_LLSC_WAR logic in atomic.h
Huacai Chen <[email protected]>
| Newsgroups | gmane.linux.kernel.stable,gmane.linux.ports.mips.general |
|---|---|
| Message-ID | <[email protected]> |
Commit 4936084c2ee227524c242d79 ("MIPS: Cleanup R10000_LLSC_WAR logic
in atomic.h") introduce a mistake in atomic64_fetch_##op##_relaxed(),
because it forget to delete R10000_LLSC_WAR in the if-condition. So fix
it.
Fixes: 4936084c2ee227524c24 ("MIPS: Cleanup R10000_LLSC_WAR logic in atomic.h")
Cc: [email protected]
Cc: Joshua Kinard <[email protected]>
Signed-off-by: Huacai Chen <[email protected]>
---
arch/mips/include/asm/atomic.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index e8fbfd4..43fcd35 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -313,7 +313,7 @@ static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v) \
{ \
long result; \
\
- if (kernel_uses_llsc && R10000_LLSC_WAR) { \
+ if (kernel_uses_llsc) { \
long temp; \
\
__asm__ __volatile__( \
--
2.7.0