Re: [PATCH v7 0/4] PCI: Add support for resetting the Root Ports in a platform specific way

On Tue, May 19, 2026 at 07:19:51PM +0200, Niklas Cassel wrote:
> Hello Mani,
> 
> On Mon, May 18, 2026 at 11:51:56AM +0530, Manivannan Sadhasivam wrote:
> > > 
> > > With the patch above. There is zero difference before/after reset, and all
> > > the BAR tests pass. However, MSI/MSI-X tests still fail with:
> > > 
> > > # pci_endpoint_test.c:143:MSI_TEST:Expected 0 (0) == ret (-110) 
> > > # pci_endpoint_test.c:143:MSI_TEST:Test failed for MSI1
> > > 
> > > ETIMEDOUT.
> > > 
> > > This suggests that pci_endpoint_test on the host side did not receive an
> > > interrupt.
> > > 
> > > I don't know why, but considering that lspci output is now (with the
> > > save+restore) identical, I assume that the problem is not related to
> > > the host. Unless somehow the host will use a new/different MSI address
> > > after the root port has been reset, and we restore the old MSI address,
> > > but looking at the code, dw_pcie_msi_init() is called by
> > > dw_pcie_setup_rc(), so I would expect the MSI address to be the same.
> > > 
> > 
> > Hi Niklas,
> > 
> > When I rebased this series on top of v7.1-rc1, I ended up seeing the issue what
> > you described here (not sure why I didn't see it earlier). So after the Root
> > Port reset, MSI tests fail, but BAR tests succeed. Also, I got IOMMU faults on
> > the host after endpoint triggers MSI.
> > 
> > I investigated it and found that the MSI iATU mapping gets cleared in hw after
> > LDn happens. But the host continues to use the same address/size for the
> > endpoint MSI even after reset. Due to this, the existing checks in
> > dw_pcie_ep_raise_msi_irq() don't pass and the stale MSI iATU mapping gets
> > reused.
> > 
> > The fix would be to clear the mapping in dw_pcie_ep_cleanup(), which gets called
> > as part of the PERST# assert/deassert sequence post LDn and also set
> > msi_iatu_mapped flag to 'false'. This will force dw_pcie_ep_raise_msi_irq() to
> > use fresh iATU mapping when it gets called for the first time:
> > 
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> > index d4dc3b24da60..4ae0e1b55f39 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> > @@ -1035,6 +1035,11 @@ void dw_pcie_ep_cleanup(struct dw_pcie_ep *ep)
> >  {
> >         struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> >  
> > +       if (ep->msi_iatu_mapped) {
> > +               dw_pcie_ep_unmap_addr(ep->epc, 0, 0, ep->msi_mem_phys);
> > +               ep->msi_iatu_mapped = false;
> > +       }
> > +
> >         dwc_pcie_debugfs_deinit(pci);
> >         dw_pcie_edma_remove(pci);
> >  }
> > 
> > With this change, MSI works after Root Port reset without any issues on our Qcom
> > endpoint/host setup.
> > 
> > Please test this change on your rockchip setup as well. You have to make sure
> > that dw_pcie_ep_cleanup() is called during PERST# assert/deassert.
> > 
> > I'm going to respin the series with this fix. If you confirm it works for you,
> > then we can merge your Rockchip Root Port change.

Somehow, this reply fell into the cracks...

> 
> I am happy to hear that you managed to find the root cause!
> 
> Hopefully your series can finally move forward :)
> 
> While e.g. RK3588 does have a PERST# input GPIO, so it could theoretically
> add a perst_deassert()/assert() function. However, when the EPC support was
> added, you did not want that, since I remember that you said that you only
> wanted that for drivers that required an external refclock.
> 

Hmm, I don't recall exactly that conversation, but if I said that then I was
wrong. PERST# assert()/dessert() have nothing to do with REFCLK. Maybe I was too
focused on doing things assuming that REFCLK won't be available.

But anyhow, feel free to add it now.

- Mani

-- 
மணிவண்ணன் சதாசிவம்