[PATCH v3 0/4] Base support for Power12

This series enables Power12 raw and architected mode with Performance
Monitoring support.

Changes in v3
- Rebase patch series on v7.2-rc6
- Remove extra tab in #define to maintain visual alignment.
- Remove unintentional whitespace change.
- See v2 at https://lore.kernel.org/linuxppc-dev/[email protected]/

Chnages in v2:
- Fix typo reported by Nikhil
- Define a named macro CAS_MAX_PVR_ENTRIES
- See v1 at https://lore.kernel.org/linuxppc-dev/[email protected]/

Athira Rajeev (1):
  powerpc/perf: Add power12 Base Performance Monitoring support

Mahesh Salgaonkar (1):
  powerpc/pseries: Limit PVR list to 16 entries for CAS negotiation

Nicholas Piggin (1):
  powerpc: Add Power12 raw mode

Ritesh Harjani (IBM) (1):
  powerpc: Add Power12 architected mode

 arch/powerpc/include/asm/cpu_setup.h      |   2 +
 arch/powerpc/include/asm/cputable.h       |  17 +-
 arch/powerpc/include/asm/mmu.h            |   1 +
 arch/powerpc/include/asm/prom.h           |   3 +-
 arch/powerpc/include/asm/reg.h            |   5 +-
 arch/powerpc/include/asm/synch.h          |   6 +-
 arch/powerpc/include/uapi/asm/cputable.h  |   2 +
 arch/powerpc/kernel/cpu_setup_power.c     |  43 ++
 arch/powerpc/kernel/cpu_specs_book3s_64.h |  36 ++
 arch/powerpc/kernel/dt_cpu_ftrs.c         |  37 ++
 arch/powerpc/kernel/prom_init.c           |  46 ++-
 arch/powerpc/kernel/setup-common.c        |   1 +
 arch/powerpc/kvm/book3s_hv.c              |   9 +-
 arch/powerpc/mm/book3s64/hash_native.c    |  22 +-
 arch/powerpc/mm/init_64.c                 |   4 +-
 arch/powerpc/perf/Makefile                |   2 +-
 arch/powerpc/perf/core-book3s.c           |   2 +
 arch/powerpc/perf/internal.h              |   1 +
 arch/powerpc/perf/power12-events-list.h   |  78 ++++
 arch/powerpc/perf/power12-pmu.c           | 466 ++++++++++++++++++++++
 20 files changed, 760 insertions(+), 23 deletions(-)
 create mode 100644 arch/powerpc/perf/power12-events-list.h
 create mode 100644 arch/powerpc/perf/power12-pmu.c

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2.55.0