Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA
Conor Dooley <[email protected]>
| Newsgroups | gmane.linux.ports.mips,gmane.linux.kernel,gmane.linux.kernel.arc,gmane.linux.ports.arm.kernel,gmane.linux.ports.hexagon,gmane.linux.ports.parisc,gmane.linux.ports.ppc64.devel,gmane.linux.ports.riscv,gmane.linux.ports.sh.devel,gmane.linux.ports.sparc |
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| Message-ID | <764e8d2f-ed98-49dc-8fdb-112d59359148@spud> |
On Mon, Mar 27, 2023 at 02:13:05PM +0200, Arnd Bergmann wrote: > From: Arnd Bergmann <[email protected]> > > For a DMA_BIDIRECTIONAL transfer, the caches have to be cleaned > first to let the device see data written by the CPU, and invalidated > after the transfer to let the CPU see data written by the device. > > riscv also invalidates the caches before the transfer, which does > not appear to serve any purpose. Rationale makes sense to me.. Reviewed-by: Conor Dooley <[email protected]> Thanks for working on all of this Arnd!
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