Re: [PATCH 15/21] ARM: dma-mapping: always invalidate WT caches before DMA
Linus Walleij <[email protected]>
| Newsgroups | gmane.linux.ports.ppc.embedded,gmane.linux.ports.sh.devel,gmane.linux.ports.mips,gmane.linux.ports.sparc,gmane.linux.ports.riscv,gmane.linux.kernel.arc,gmane.linux.ports.arm.kernel,gmane.linux.ports.parisc,gmane.linux.kernel,gmane.linux.ports.hexagon |
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| Message-ID | <CACRpkdbMry_UUYN1MuXTUpRXV+Tj9RSDvN-iBdvR8hDfkTaX4w@mail.gmail.com> |
On Mon, Mar 27, 2023 at 2:16 PM Arnd Bergmann <[email protected]> wrote: > From: Arnd Bergmann <[email protected]> > > Most ARM CPUs can have write-back caches and that require > cache management to be done in the dma_sync_*_for_device() > operation. This is typically done in both writeback and > writethrough mode. > > The cache-v4.S (arm720/740/7tdmi/9tdmi) and cache-v4wt.S > (arm920t, arm940t) implementations are the exception here, > and only do the cache management after the DMA is complete, > in the dma_sync_*_for_cpu() operation. > > Change this for consistency with the other platforms. This > should have no user visible effect. > > Signed-off-by: Arnd Bergmann <[email protected]> Looks good to me. Reviewed-by: Linus Walleij <[email protected]> Yours, Linus Walleij