Re: [PATCH] cachestat: wire up cachestat for other architectures
Nhat Pham <[email protected]>
| Newsgroups | gmane.linux.kernel.api,gmane.linux.kernel.mm,gmane.linux.kernel.cross-arch,gmane.linux.ports.alpha,gmane.linux.kernel,gmane.linux.ports.arm.kernel,gmane.linux.ports.ia64,gmane.linux.ports.mips,gmane.linux.ports.parisc,gmane.linux.ports.ppc64.devel,gmane.linux.ports.sh.devel,gmane.linux.ports.sparc |
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| Message-ID | <CAKEwX=OFVkc2GL3jmoC-qAuwZvzxfs7v__aWY=8bLY3MeMq9hA@mail.gmail.com> |
On Thu, May 11, 2023 at 12:05 AM Arnd Bergmann <[email protected]> wrote: > > On Wed, May 10, 2023, at 21:58, Nhat Pham wrote: > > cachestat is previously only wired in for x86 (and architectures using > > the generic unistd.h table): > > > > https://lore.kernel.org/lkml/20230503013608.2431726-1-nphamcs-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org/ > > > > This patch wires cachestat in for all the other architectures. > > > > Signed-off-by: Nhat Pham <[email protected]> > > The changes you did here look good, but you missed one > file that has never been converted to the syscall.tbl format: > arch/arm64/include/asm/unistd32.h along with the __NR_compat_syscalls > definition in arch/arm64/include/asm/unistd.h, please add those > as well, and then > > Reviewed-by: Arnd Bergmann <[email protected]> Just sent a follow-up fixlet for this: https://lore.kernel.org/linux-mm/20230511092843.3896327-1-nphamcs-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org/T/#u Thanks for the suggestion!