Re: [PATCH] sh: boot: Remove sh5 cache handling

On Mon, 29 Apr 2024 17:06:44 +0900,
Geert Uytterhoeven wrote:
> 
> Hi Adrian,
> 
> On Mon, Apr 29, 2024 at 9:52 AM John Paul Adrian Glaubitz
> <[email protected]> wrote:
> > On Mon, 2024-04-29 at 09:49 +0200, Geert Uytterhoeven wrote:
> > > On Mon, Apr 29, 2024 at 9:46 AM John Paul Adrian Glaubitz
> > > <[email protected]> wrote:
> > > > On Wed, 2024-04-24 at 13:54 +0200, Geert Uytterhoeven wrote:
> > > > > Commit 37744feebc086908 ("sh: remove sh5 support") in v5.8 forgot to
> > > > > remove the sh5 cache handling.
> > > > >
> > > > > Suggested-by: Yoshinori Sato <[email protected]>
> > > > > Signed-off-by: Geert Uytterhoeven <[email protected]>
> > >
> > > > > --- a/arch/sh/boot/compressed/cache.c
> > > > > +++ /dev/null
> > > > > @@ -1,13 +0,0 @@
> > > > > -// SPDX-License-Identifier: GPL-2.0
> > > > > -int cache_control(unsigned int command)
> > > > > -{
> > > > > -     volatile unsigned int *p = (volatile unsigned int *) 0x80000000;
> > > > > -     int i;
> > > > > -
> > > > > -     for (i = 0; i < (32 * 1024); i += 32) {
> > > > > -             (void)*p;
> > > > > -             p += (32 / sizeof(int));
> > > > > -     }
> > > > > -
> > > > > -     return 0;
> > > > > -}
> > >
> > > > Interesting, looking at boot/compressed/cache.c, it seems that the whole code
> > > > is actually a no-op and does nothing but increasing a pointer. So I agree we
> > > > should just delete it.
> > >
> > > It is not a no-op: it also reads from memory, to load new data in
> > > the cache, and evicting the old data.
> >
> > Yeah, I actually came to this conclusion right after sending my reply. However, the
> > command parameter is never used.
> >
> > Don't have the 32-bit SH CPUs any caches? The code itself is unconditionally executed,
> > it seems.
> 
> They do. E.g. SH7751 has 8+8 KiB of L1 cache.
> But e.g. sh7724 has 32+32KiB L1 cache, and 256 KiB of unified L2 cache.
> SH772[34] have l2_cache_init() to enable the L2 cache, so probably they
> boot with L2 disabled, and we are fine.
> 
> Unfortunately I don't have access to a SH772[34] system.
> Sato-san: can you confirm?
> Thanks!

32-bit SH requires different cache control for each SoC.
It's difficult to put general purpose cache control code here.

The location where the zImage is expanded is not in the instruction cache,
so there is no problem even if it is not explicitly flushed after expansion.
boot/compressed/cache.c also has no meaning now.

> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> -- 
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

-- 
Yosinori Sato