[DO NOT MERGE v8 04/36] dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC.
Yoshinori Sato <[email protected]>
| Newsgroups | gmane.linux.kernel.renesas-soc,gmane.linux.ports.sh.devel,gmane.linux.ide,gmane.linux.drivers.devicetree,gmane.linux.kernel,gmane.linux.kernel.clk,gmane.comp.video.dri.devel,gmane.linux.kernel.pci,gmane.linux.serial |
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| Message-ID | <98a4466e189f5f0358b0525d96d0207398907009.1716965617.git.ysato@users.sourceforge.jp> |
Renesas SH7751 Interrupt controller priority register define. Signed-off-by: Yoshinori Sato <[email protected]> --- .../renesas,sh7751-intc.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h diff --git a/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h new file mode 100644 index 000000000000..0543bd1b895e --- /dev/null +++ b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * SH3/4 INTC IPR register offsets (Address / bits) + */ + +#ifndef __DT_BINDINGS_RENESAS_SH7751_INTC +#define __DT_BINDINGS_RENESAS_SH7751_INTC + +#define IPRA 0 +#define IPRB 4 +#define IPRC 8 +#define IPRD 12 +#define INTPRI00 256 +#define IPR_B12 12 +#define IPR_B8 8 +#define IPR_B4 4 +#define IPR_B0 0 + +#endif -- 2.39.2