[linux-sh:03325] SH5 - A question concerning the performance

Hi,

I have (maybe a stupid) question, but I'm not completely sure about this.

I use only SW development kit, so for the benchmarks of my algorithms I need
to know the duration 1 instruction cycle. 

 

I suppose, for 400 MHz core, one instruction cycle is

1/(400*10^6) = 2.5 ns

Or not? I'm not sure because somewhere in the doc I have read that

1 instruction cycle = 4T.

What represent this "T"? If T = 1/frequency then 1 instruction cycle =
4*2.5ns = 10 ns?

 

 

Thank you for any response.

 

J(Y)aromir