Re: xcalibur codes

Mathew Saxton wrote:
> Just wondering if this went anywhere.. Good luck with it..
>
Thank you.
Progress so far:
I have incorporated the new code tables into the video driver
and compiled this into the 2.4.30 kernel.
This seems to be setting the xcalibur tv encoder, but not producing
a valid setup, because the screen becomes a garbled mess.
I believe that the riva setup, through PCI write, needs the
associated timing to correspond to these tv encoder settings.
In order to find these out, I now plan to run a debug bios to
trace the exact numbers sent to the nvidia chip ( through pci )
and the xcalibur chip ( through SMBus ).  This way I should
be able to calculate back to the pixel clock, horz and vert
margins, and to check that the 0x90 range captures all encoder
config.

Oh for some xcalibur docs!
I heard the rumour that it might be an SIS design, and found
that the SiS301C video bridge looked most likely, but there
are no docs for this that I could find - only the X driver.

I expect that my reverse engineering approach will lead to
success, docs would simply save time.

I will post any further progress.



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