Re: [PATCH V3 3/5] raid6: riscv: Prevent compiler with vector support to build already vectorized code

Hi,

On Fri, 18 Jul 2025, Chunyan Zhang wrote:

> To avoid the inline assembly code to break what the compiler could have
> vectorized, this code must be built without compiler support for vector.
> 
> Signed-off-by: Chunyan Zhang <[email protected]>

This one has been queued with a somewhat modified commit message to 
reflect what I thought the intention is.  But I might be wrong.  Can you 
check it, please?

thanks,


- Paul

From: Chunyan Zhang <[email protected]>
Date: Mon, 17 Nov 2025 21:19:24 -0700

raid6: riscv: Prevent compiler from breaking inline vector assembly code

To prevent the compiler from breaking the inline vector assembly code,
this code must be built without compiler support for vector.

Signed-off-by: Chunyan Zhang <[email protected]>
Link: https://patch.msgid.link/[email protected]
[[email protected]: cleaned up commit message]
Signed-off-by: Paul Walmsley <[email protected]>
---
 lib/raid6/rvv.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/raid6/rvv.c b/lib/raid6/rvv.c
index 89da5fc247aa..015f3ee4da25 100644
--- a/lib/raid6/rvv.c
+++ b/lib/raid6/rvv.c
@@ -20,6 +20,10 @@ static int rvv_has_vector(void)
 	return has_vector();
 }
 
+#ifdef __riscv_vector
+#error "This code must be built without compiler support for vector"
+#endif
+
 static void raid6_rvv1_gen_syndrome_real(int disks, unsigned long bytes, void **ptrs)
 {
 	u8 **dptr = (u8 **)ptrs;
-- 
2.48.1