Re: [PATCH 0/6] x86: add missing vzeroupper instructions
David Laight <[email protected]>
| Newsgroups | gmane.linux.kernel.cryptoapi,gmane.linux.kernel,gmane.linux.raid,gmane.comp.security.firewalls.netfilter.devel |
|---|---|
| Message-ID | <20260816161450.05fd24f2@pumpkin> |
On Sat, 15 Aug 2026 13:57:44 -0700 Eric Biggers <[email protected]> wrote: > Assembly code using YMM or ZMM registers is supposed to end with the > vzeroupper instruction in order to avoid degrading the performance of > any later SSE code. Since this only affects performance and not > correctness, it is sometimes overlooked. Most kernel code does it > correctly, but a few cases were missed. This series fixes them. > > It should be easiest to take the full series through the x86 tree. Would it be better to an an unconditional vzeroupper in kernel_fpu_end()? It could go in kernel_fpu_start() but that might have a bigger effect on latency. (I assume there is one in kernel_fpu_start() if it actually saves the user registers?) Looking the latency/uops seems reasonably on everything 'recent' except zen-1 and knights-landing. Although the microcode patch for zen-2 might make that a lot worse. David > > Eric Biggers (6): > xor: add missing vzeroupper to AVX code > raid6: add missing vzeroupper to AVX2 code > raid6: add missing vzeroupper to AVX-512 code > crypto: x86/aria - add missing vzeroupper in AVX2 code > crypto: x86/aria - add missing vzeroupper in AVX-512 code > netfilter: nft_set_pipapo_avx2: add missing vzeroupper > > arch/x86/crypto/aria-aesni-avx2-asm_64.S | 6 ++++++ > arch/x86/crypto/aria-gfni-avx512-asm_64.S | 3 +++ > lib/raid/raid6/x86/avx2.c | 6 ++++++ > lib/raid/raid6/x86/avx512.c | 6 ++++++ > lib/raid/raid6/x86/recov_avx2.c | 2 ++ > lib/raid/raid6/x86/recov_avx512.c | 2 ++ > lib/raid/xor/x86/xor-avx.c | 1 + > net/netfilter/nft_set_pipapo_avx2.c | 17 ++++++++--------- > 8 files changed, 34 insertions(+), 9 deletions(-) > > > base-commit: db2ddb87143519e20a95aa36c60b36107b736a58