Re: Fwd: AMD x2 chips
"Bryan J. Smith" <[email protected]> Thu, 16 Feb 2006 06:34:59 -0500
| Newsgroups | gmane.linux.redhat.amd64 |
|---|---|
| Message-ID | <[email protected]> |
On Wed, 2006-02-15 at 23:00 -0500, Mark Hahn wrote: > no, just one IC. One "die" -- but each CPU is an independent integrated circuit (IC). > you mean in the trivial sense that each core is replicated? sure. I meant versus Intel who has to do additional bridging inside theirs. > none: > http://multicore.amd.com/Products/AMD_Opteron_Overview.pdf > the chip is based on a crossbar-like arbiter that connects HT ports, > DRAM controller and the cores. the latter connect together, apparently. > they might be different ports on the crossbar, but they're definitely > not using HT, since a DC chip is a single HT "node" for addressing purposes. First off, that's _not_ a technical manual. Secondly, AMD _does_ reference it's "Direct Connect Architecture" and other technologies. It would _not_ surprise me if that Crossbar is _indeed_ just a HyperTransport interconnect -- or some kind of more primitive EV6 interconnect. Remember, AMD is doing multi-_board_ with HyperTransport as well. Literally "daisy chaining" HyperTransport from each 4 CPU board to another over additional HyperTransport interconnects. So what's to say they're not doing the same _inside_ each die? -- Bryan J. Smith Professional, technical annoyance mailto:[email protected] http://thebs413.blogspot.com ------------------------------------------------------------ Overworked IT Professional #52: Your wife can only reach you via e-mail, but it is filtered out because it says ... "I Love You."