Re: Itanium 2 processor
John Reiser <jreiser-L8/tzxVKHrlWk0Htik3J/[email protected]> Fri, 02 Nov 2007 08:19:38 -0700
| Newsgroups | gmane.linux.redhat.release.taroon.general |
|---|---|
| Organization | - |
| Message-ID | <[email protected]> |
>> cat /proc/cpuinfo > Ok, but nothing about cache size: > > processor : 0 > vendor : GenuineIntel > arch : IA-64 > family : Itanium 2 > model : 2 > revision : 1 > archrev : 0 > features : branchlong > cpu number : 0 > cpu regs : 4 > cpu MHz : 1600.010360 > itc MHz : 1600.010360 > BogoMIPS : 2390.75 These Elf64_auxv_t entries should give some info: ----- /usr/include/elf.h #define AT_DCACHEBSIZE 19 /* Data cache block size. */ #define AT_ICACHEBSIZE 20 /* Instruction cache block size. */ #define AT_UCACHEBSIZE 21 /* Unified cache block size. */ #define AT_L1I_CACHESHAPE 34 #define AT_L1D_CACHESHAPE 35 #define AT_L2_CACHESHAPE 36 #define AT_L3_CACHESHAPE 37 ----- As to how to see them, try something such as: ----- $ gdb hello (gdb) b main (gdb) run <<breakpoint>> (gdb) x/128xg $sp (gdb) <<Enter>> ----- and continue looking far enough. The auxv entries occupy memory immediately after the environment pointers. -- -- Taroon-list mailing list [email protected] https://www.redhat.com/mailman/listinfo/taroon-list