Re: [PATCH v2 03/10] dt-bindings: clock: add Ambarella CV75 RCT clock controller
Krzysztof Kozlowski <[email protected]> Fri, 7 Aug 2026 08:02:48 +0200
| Newsgroups | gmane.linux.kernel.clk,gmane.linux.drivers.devicetree,gmane.linux.ports.arm.kernel,gmane.linux.kernel,gmane.linux.kernel.gpio,gmane.linux.serial |
|---|---|
| Message-ID | <20260807-horned-blazing-whippet-c3eb73@quoll> |
On Thu, Aug 06, 2026 at 05:34:11PM +0800, Long Zhao wrote: > Add the CV75 RCT clock controller binding and clock ID header. > > Signed-off-by: Long Zhao <[email protected]> > --- > .../bindings/clock/ambarella,cv75-rct.yaml | 66 ++++++++++++++++++++++ > include/dt-bindings/clock/ambarella,cv75-clock.h | 17 ++++++ > 2 files changed, 83 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/ambarella,cv75-rct.yaml b/Documentation/devicetree/bindings/clock/ambarella,cv75-rct.yaml > new file mode 100644 > index 000000000000..aa96533bab9b > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/ambarella,cv75-rct.yaml > @@ -0,0 +1,66 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/ambarella,cv75-rct.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Ambarella CV75 RCT Clock Controller > + > +maintainers: > + - Long Zhao <[email protected]> > + > +description: | > + The RCT (Reset and Clock Tree) block on the Ambarella CV75 SoC provides > + PLLs, clock muxes and dividers for on-chip peripherals. > + > + The same register region is also exposed as a syscon for other SoC > + blocks (e.g. pin drive-strength), hence the "syscon" compatible. > + > + Clock indices are defined in > + include/dt-bindings/clock/ambarella,cv75-clock.h: > + > + - CV75_GCLK_UART0: UART0 mux/div clock > + - CV75_GCLK_CORE: Core PLL (gclk_core) > + - CV75_GCLK_AHB: AHB bus clock (core / 2) > + - CV75_GCLK_APB: APB bus clock (core / 4) > + > +properties: > + $nodename: > + pattern: "^clock-controller@" Drop nodename. > + > + compatible: > + items: > + - const: ambarella,cv75-rct > + - const: syscon > + > + reg: > + maxItems: 1 > + > + clocks: > + description: Reference crystal oscillator (typically 24 MHz) > + maxItems: 1 > + > + clock-names: > + const: osc > + > + "#clock-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - "#clock-cells" > + > +additionalProperties: false > + > +examples: > + - | > + clock-controller@ed080000 { > + compatible = "ambarella,cv75-rct", "syscon"; > + reg = <0xed080000 0x1000>; > + clocks = <&osc>; > + clock-names = "osc"; > + #clock-cells = <1>; > + }; > diff --git a/include/dt-bindings/clock/ambarella,cv75-clock.h b/include/dt-bindings/clock/ambarella,cv75-clock.h > new file mode 100644 > index 000000000000..3d3314446e75 > --- /dev/null > +++ b/include/dt-bindings/clock/ambarella,cv75-clock.h Filenames must be the same. > @@ -0,0 +1,17 @@ > +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ > +/* > + * Copyright (C) 2026 Ambarella, Inc. > + */ > + > +#ifndef _DT_BINDINGS_CLOCK_AMBARELLA_CV75_CLOCK_H > +#define _DT_BINDINGS_CLOCK_AMBARELLA_CV75_CLOCK_H > + > +/* Boot / bus clocks */ > +#define CV75_GCLK_UART0 0 > +#define CV75_GCLK_CORE 1 > +#define CV75_GCLK_AHB 2 > +#define CV75_GCLK_APB 3 > + > +#define CV75_CLK_NUM 4 Drop, not a binding. > + > +#endif > > -- > 2.34.1 >