Re: [PATCH 4/7] serial: qcom-geni: Use geni_se_set_rate() for source clock configuration
Konrad Dybcio <[email protected]>
| Newsgroups | gmane.linux.ports.arm.msm,gmane.linux.ports.arm.kernel,gmane.linux.power-management.general,gmane.linux.kernel,gmane.linux.serial,gmane.linux.kernel.spi.devel,gmane.linux.drivers.i2c |
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| Message-ID | <[email protected]> |
On 8/4/26 9:57 PM, Praveen Talari wrote: > The driver calls dev_pm_opp_set_rate() directly on uport->dev to apply > the computed source clock frequency, and dispatches baud rate handling > through a per-variant dev_data->set_rate() callback that either > recalculates the clock divider (Linux clock managed path) or selects > a performance level via geni_se_set_perf_level() (SA8255P firmware > managed path). [...] > + geni_se_set_rate(&port->se, 0); This ends up calling dev_pm_opp_set_rate(0) [i see this is an existing bug in geni_se_resources_deactivate()], which removes the power vote, but does nothing to the clock (neither set_rate nor disable_unprepare), which will crash the platform Both of these calls (new and existing) should be removed. Clocks will be disabled by geni_se_clks_off() in geni_se_resources_deactivate(). Then, we should do dev_pm_set_opp(se->dev, NULL) *after* they are off to remove any trailing OPP resources (i.e. icc votes defined in the OPP table in our case) Konrad