big page mode and TLB thrashing

Hi all,

I'm building up a compute engine to run a memory-intensive application.  The app code will be tuned to the available ram size (currently 1.5 GB but I'm still shopping on Ebay.)

Each processor has 128 or 256 TLBs and each one maps one 8KB page, so I can have at most maybe six megs cached in the TLBs, assuming I had three x ev5.6 or better.  But I don't, I've got three x ev5.  (still shopping ... :-)

This is really an AXP kernel question and perhaps there is a better list for it?  Anyway, I would like to know if anybody has already done a patch set to enable large page mode on an Alpha or, for that matter, on an Intel machine.  Setting the bits is easy enough but knowing what will break and how it might be fixed takes a bit more Linux internals experience than I've got.  I'd be more comfortable tackling it in BSD but even there I really have my hands full doing the theory and coding the application.

Can the TLB miss rate and/or time spent servicing TLB misses be measured on Linux?

I'm currently running a 2.4.21 SMP kernel on a 4100; works great.  There were many problems with configuration of 2.4.20 on Wranglers but .21 is clean.  (/proc/cpuinfo still erroneously reports an ev56 cpu core, though.)

-steve