Re: [PATCH v14 8/9] KVM: x86: virtualize cpuid faulting

> On Jul 27, 2018, at 1:28 PM, Jim Mattson <[email protected]> wrote:
>=20
>> On Fri, Jul 27, 2018 at 12:41 PM, Andy Lutomirski <[email protected]> wrote=
:
>>> On Wed, Feb 8, 2017 at 12:09 AM, Kyle Huey <[email protected]> wrote:
>>> Hardware support for faulting on the cpuid instruction is not required t=
o
>>> emulate it, because cpuid triggers a VM exit anyways. KVM handles the re=
levant
>>> MSRs (MSR_PLATFORM_INFO and MSR_MISC_FEATURES_ENABLE) and upon a
>>> cpuid-induced VM exit checks the cpuid faulting state and the CPL.
>>> kvm_require_cpl is even kind enough to inject the GP fault for us.
>>>=20
>>> Signed-off-by: Kyle Huey <[email protected]>
>>> Reviewed-by: David Matlack <[email protected]>
>>> ---
>>> ...
>>> @@ -7613,16 +7636,19 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool i=
nit_event)
>>>=20
>>>        kvm_clear_async_pf_completion_queue(vcpu);
>>>        kvm_async_pf_hash_reset(vcpu);
>>>        vcpu->arch.apf.halted =3D false;
>>>=20
>>>        if (!init_event) {
>>>                kvm_pmu_reset(vcpu);
>>>                vcpu->arch.smbase =3D 0x30000;
>>> +
>>> +               vcpu->arch.msr_platform_info =3D MSR_PLATFORM_INFO_CPUID=
_FAULT;
>>> +               vcpu->arch.msr_misc_features_enables =3D 0;
>>=20
>> Jim, I assume you're worried about this bit?  It seems like
>> msr_platform_info should maybe be initialized to zero to avoid causing
>> an unintended migration issue.
>=20
> Initializing this bit to zero helps with migration, but then if the
> CPUID faulting bits in both MSRs are set, userspace has to take pains
> to ensure that MSR_PLATFORM_INFO is restored first, or the
> MSR_MISC_FEATURES_ENABLES value will be rejected.

The code could drop the constraint and just let the entry possibly fail if t=
he MSRs are set wrong

>=20
> I'm also concerned about the 0 in the "Maximum Non-Turbo Ratio" field
> feeding into someone's calculated TSC frequency.

Hmm. I don=E2=80=99t have a good answer to that. Are there any real CPUs tha=
t have this MSR but don=E2=80=99t have that field?=