question on irqs and memory ordering

Hi,

I am looking at this code:

	if (new_msr &
	    (MOS_MSR_DELTA_CTS | MOS_MSR_DELTA_DSR | MOS_MSR_DELTA_RI |
	     MOS_MSR_DELTA_CD)) {
		icount = &mos7840_port->icount;

		/* update input line counters */
		if (new_msr & MOS_MSR_DELTA_CTS) {
			icount->cts++;
		}
		if (new_msr & MOS_MSR_DELTA_DSR) {
			icount->dsr++;
		}
		if (new_msr & MOS_MSR_DELTA_CD) {
			icount->dcd++;
		}
		if (new_msr & MOS_MSR_DELTA_RI) {
			icount->rng++;
		}
	}

It is called in interrupt and uses no locking. What happens if the next
irq is processed on another cpu? Is that cpu guaranteed to see the updates
to the incremented variables?

	Regards
		Oliver

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