Re: ehci memory allocation question
David Brownell <[email protected]>
| Newsgroups | gmane.linux.usb.devel |
|---|---|
| Message-ID | <[email protected]> |
On Friday 15 June 2007, Oliver Neukum wrote: > Hi, > > I've been looking at memory management in ehci. IMHO to cleanly > solve the deadlock, Context please. What deadlock? Has it been observed? > callers need a way to pass down memory reserves > to the HCD. As they are unique to the bus, this needs a method to allocate > such reserves from the HCD. ... and what do you mean by "reserves"? The current allocation scheme for every per-request resource is the same: submit an URB. That accounts for urb-private housekeeping overhead, as well as (often) DMA descriptors. Different hardware has different requirements. Philips has a lot of controllers that require using on-chip SRAM for their variants of OHCI or EHCI DMA descriptors. Some chips don't have DMA descriptors, just single-transfer controllers which use per-FIFO registers. Some don't do DMA at all. ------------------------------------------------------------------------- This SF.net email is sponsored by DB2 Express Download DB2 Express C - the FREE version of DB2 express and take control of your XML. No limits. Just data. Click to get it now. http://sourceforge.net/powerbar/db2/ _______________________________________________ [email protected] To unsubscribe, use the last form field at: https://lists.sourceforge.net/lists/listinfo/linux-usb-devel