Re: [PATCH] USB: m66592-udc: Add support for SH7722 USBF

David Brownell <[email protected]>
Newsgroups gmane.linux.usb.devel
Message-ID <[email protected]>
On Sunday 28 October 2007, Yoshihiro Shimoda wrote:
> Add support for SuperH SH7722 USB Function.
> 
> M66592 is similar to SH7722 USBF. It can support SH7722 USBF by
> changing several M66592 code.
> 
> Signed-off-by: Yoshihiro Shimoda <[email protected]>

ACK ... though see below.

And I suspect you're missing clock management for the on-chip code,
and assuming that "someone else" turns on the clocks needed by this
particular functional module.  Since this all seems quite new, I'd
expect such patches to show up later.


> ---
> 
>  drivers/usb/gadget/Kconfig      |   10 +++++++
>  drivers/usb/gadget/m66592-udc.c |   40 +++++++++++++++++++++++++++++-
>  drivers/usb/gadget/m66592-udc.h |   34 +++++++++++++++++++++++++
>  3 files changed, 83 insertions(+), 1 deletion(-)
> 
> diff -uprN a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
> --- a/drivers/usb/gadget/Kconfig	2007-10-24 12:50:57.000000000 +0900
> +++ b/drivers/usb/gadget/Kconfig	2007-10-29 13:23:48.000000000 +0900
> @@ -220,6 +220,16 @@ config USB_M66592
>  	default USB_GADGET
>  	select USB_GADGET_SELECTED
> 
> +config SUPERH_BUILT_IN_M66592
> +	boolean "Enable SuperH built-in USB like the M66592"
> +	depends on USB_GADGET_M66592 && CPU_SUBTYPE_SH7722
> +	help
> +	   SH7722 has USB like the M66592.
> +
> +	   The transfer rate is very slow when use "Ethernet Gadget".
> +	   However, this problem is improved if change a value of
> +	   NET_IP_ALIGN to 4.
> +
>  config USB_GADGET_GOKU
>  	boolean "Toshiba TC86C001 'Goku-S'"
>  	depends on PCI
> diff -uprN a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c
> --- a/drivers/usb/gadget/m66592-udc.c	2007-10-24 12:50:57.000000000 +0900
> +++ b/drivers/usb/gadget/m66592-udc.c	2007-10-29 13:23:48.000000000 +0900
> @@ -36,9 +36,14 @@ MODULE_DESCRIPTION("M66592 USB gadget dr
>  MODULE_LICENSE("GPL");
>  MODULE_AUTHOR("Yoshihiro Shimoda");
> 
> -#define DRIVER_VERSION	"29 May 2007"
> +#define DRIVER_VERSION	"18 Oct 2007"
> 
>  /* module parameters */
> +#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
> +static unsigned short endian = M66592_LITTLE;
> +module_param(endian, ushort, 0644);
> +MODULE_PARM_DESC(endian, "data endian: big=0, little=0 (default=0)");
> +#else
>  static unsigned short clock = M66592_XTAL24;
>  module_param(clock, ushort, 0644);
>  MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0 "
> @@ -56,6 +61,7 @@ static unsigned short irq_sense = M66592
>  module_param(irq_sense, ushort, 0644);
>  MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0 "
>  		"(default=2)");
> +#endif
> 
>  static const char udc_name[] = "m66592_udc";
>  static const char *m66592_ep_name[] = {
> @@ -360,6 +366,7 @@ static void m66592_ep_setting(struct m66
>  			ep->fifosel = M66592_D0FIFOSEL;
>  			ep->fifoctr = M66592_D0FIFOCTR;
>  			ep->fifotrn = M66592_D0FIFOTRN;
> +#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
>  		} else if (m66592->num_dma == 1) {
>  			m66592->num_dma++;
>  			ep->use_dma = 1;
> @@ -367,6 +374,7 @@ static void m66592_ep_setting(struct m66
>  			ep->fifosel = M66592_D1FIFOSEL;
>  			ep->fifoctr = M66592_D1FIFOCTR;
>  			ep->fifotrn = M66592_D1FIFOTRN;
> +#endif
>  		} else {
>  			ep->use_dma = 0;
>  			ep->fifoaddr = M66592_CFIFO;
> @@ -611,6 +619,31 @@ static void start_ep0(struct m66592_ep *
>  	}
>  }
> 
> +#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
> +static void init_controller(struct m66592 *m66592)
> +{
> +	m66592_bset(m66592, M66592_HSE, M66592_SYSCFG);		/* High spd */
> +	m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
> +	m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
> +	m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
> +
> +#if defined(CONFIG_CPU_SUBTYPE_SH7722)

But the Kconfig BUILT_IN_* option is defined only if this
CPU_SUBTYPE is set.  I take it the implication is that
other similar chips are on the way, and only this one
requires that workaround?


> +	/*
> +	 * This is a workaound for SH7722 2nd cut
> +	 */
> +	m66592_bset(m66592, 0x8000, M66592_DVSTCTR);
> +	m66592_bset(m66592, 0x1000, M66592_TESTMODE);
> +	m66592_bclr(m66592, 0x8000, M66592_DVSTCTR);
> +#endif
> +
> +	m66592_bset(m66592, M66592_INTL, M66592_INTENB1);
> +
> +	m66592_write(m66592, 0, M66592_CFBCFG);
> +	m66592_write(m66592, 0, M66592_D0FBCFG);
> +	m66592_bset(m66592, endian, M66592_CFBCFG);
> +	m66592_bset(m66592, endian, M66592_D0FBCFG);
> +}
> +#else	/* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
>  static void init_controller(struct m66592 *m66592)
>  {
>  	m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND),
> @@ -636,9 +669,11 @@ static void init_controller(struct m6659
>  	m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
>  			M66592_DMA0CFG);
>  }
> +#endif	/* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
> 
>  static void disable_controller(struct m66592 *m66592)
>  {
> +#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
>  	m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
>  	udelay(1);
>  	m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
> @@ -646,15 +681,18 @@ static void disable_controller(struct m6
>  	m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
>  	udelay(1);
>  	m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
> +#endif
>  }
> 
>  static void m66592_start_xclock(struct m66592 *m66592)
>  {
> +#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
>  	u16 tmp;
> 
>  	tmp = m66592_read(m66592, M66592_SYSCFG);
>  	if (!(tmp & M66592_XCKE))
>  		m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
> +#endif
>  }
> 
>  /*-------------------------------------------------------------------------*/
> diff -uprN a/drivers/usb/gadget/m66592-udc.h b/drivers/usb/gadget/m66592-udc.h
> --- a/drivers/usb/gadget/m66592-udc.h	2007-10-24 12:50:57.000000000 +0900
> +++ b/drivers/usb/gadget/m66592-udc.h	2007-10-29 13:23:48.000000000 +0900
> @@ -72,6 +72,11 @@
>  #define   M66592_P_TST_J	 0x0001		/* PERI TEST J */
>  #define   M66592_P_TST_NORMAL	 0x0000		/* PERI Normal Mode */
> 
> +#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
> +#define M66592_CFBCFG		0x0A
> +#define M66592_D0FBCFG		0x0C
> +#define M66592_LITTLE		0x0100	/* b8: Little endian mode */
> +#else
>  #define M66592_PINCFG		0x0A
>  #define M66592_LDRV		0x8000	/* b15: Drive Current Adjust */
>  #define M66592_BIGEND		0x0100	/* b8: Big endian mode */
> @@ -91,6 +96,7 @@
>  #define M66592_PKTM		0x0020	/* b5: Packet mode */
>  #define M66592_DENDE		0x0010	/* b4: Dend enable */
>  #define M66592_OBUS		0x0004	/* b2: OUTbus mode */
> +#endif	/* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
> 
>  #define M66592_CFIFO		0x10
>  #define M66592_D0FIFO		0x14
> @@ -103,9 +109,13 @@
>  #define M66592_REW		0x4000	/* b14: Buffer rewind */
>  #define M66592_DCLRM		0x2000	/* b13: DMA buffer clear mode */
>  #define M66592_DREQE		0x1000	/* b12: DREQ output enable */
> +#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
> +#define M66592_MBW		0x0800	/* b11: Maximum bit width for FIFO */
> +#else
>  #define M66592_MBW		0x0400	/* b10: Maximum bit width for FIFO */
>  #define   M66592_MBW_8		 0x0000   /*  8bit */
>  #define   M66592_MBW_16		 0x0400   /* 16bit */
> +#endif	/* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
>  #define M66592_TRENB		0x0200	/* b9: Transaction counter enable */
>  #define M66592_TRCLR		0x0100	/* b8: Transaction counter clear */
>  #define M66592_DEZPM		0x0080	/* b7: Zero-length packet mode */
> @@ -530,8 +540,13 @@ static inline void m66592_read_fifo(stru
>  {
>  	unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
> 
> +#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
> +	len = (len + 3) / 4;
> +	insl(fifoaddr, buf, len);
> +#else
>  	len = (len + 1) / 2;
>  	insw(fifoaddr, buf, len);
> +#endif
>  }
> 
>  static inline void m66592_write(struct m66592 *m66592, u16 val,
> @@ -545,6 +560,24 @@ static inline void m66592_write_fifo(str
>  		void *buf, unsigned long len)
>  {
>  	unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
> +#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
> +	unsigned long count;
> +	unsigned char *pb;
> +	int i;
> +
> +	count = len / 4;
> +	outsl(fifoaddr, buf, count);
> +
> +	if (len & 0x00000003) {
> +		pb = buf + count * 4;
> +		for (i = 0; i < (len & 0x00000003); i++) {
> +			if (m66592_read(m66592, M66592_CFBCFG))	/* little */
> +				outb(pb[i], fifoaddr + (3 - i));
> +			else
> +				outb(pb[i], fifoaddr + i);
> +		}
> +	}
> +#else
>  	unsigned long odd = len & 0x0001;
> 
>  	len = len / 2;
> @@ -553,6 +586,7 @@ static inline void m66592_write_fifo(str
>  		unsigned char *p = buf + len*2;
>  		outb(*p, fifoaddr);
>  	}
> +#endif	/* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
>  }
> 
>  static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat,
> 



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