Re: OHCI dl_reverse_done_list() deadly loop...

The td_dma value is listed as following, I think these are incorrectly, but
I don't know why.
[   11.930000] 348001
[   11.930000] 3480c0
[   11.930000] 348000
[   11.930000] 3480c0
[   11.930000] 348000
[   11.930000] 3480c0
[   11.930000] 348000
[   11.930000] 3480c0
[   11.930000] 348000

It seems td1->td2->td1->td2, this is a deadly loop. 
However, the first td_dma value is 0x348001, is this value  error?

Darwin Chen.
-----Original Message-----
From: [email protected]
[mailto:[email protected]] On Behalf Of Darwin
Chen
Sent: Friday, October 19, 2007 9:59 PM
To: [email protected]
Subject: [Linux-usb-users] OHCI dl_reverse_done_list() deadly loop...

Dear all,

I found a dealy loop in dl_reverse_done_list(), the while-loop doesn't exit
after the system prompts:
[    0.880000] w90n740-ohci w90n740-ohci: GetStatus roothub.portstatus [0] =
0x00010101 CSC PPS CCS
[    0.890000] hub_port_status outside.
[    0.900000] hub 1-0:1.0: port 1, status 0101, change 0001, 12 Mb/s
[    1.060000] hub 1-0:1.0: debounce: port 1: total 100ms stable 100ms
status 0x101
[    1.140000] w90n740-ohci w90n740-ohci: GetStatus roothub.portstatus [0] =
0x00100103 PRSC PPS PES CCS
[    1.210000] usb 1-1: new full speed USB device using w90n740-ohci and
address 2
 [    1.310000] w90n740-ohci w90n740-ohci: GetStatus roothub.portstatus [0]
= 0x00100103 PRSC PPS PES CCS

But the USB system is worked well when the OHCI_VERBOSE_DEBUG is defined in
ohci-hcd.c. Is there anyone help me? 
BTW, the kernel is uClinux-2.6.22, the CPU is Windond W90N740, and the DMA
is not implemented in this kernel.

static struct td *dl_reverse_done_list (struct ohci_hcd *ohci)
{
	u32		td_dma;
	struct td	*td_rev = NULL;
	struct td	*td = NULL;

	td_dma = hc32_to_cpup (ohci, &ohci->hcca->done_head);
	ohci->hcca->done_head = 0;
	wmb();

	/* get TD from hc's singly linked list, and
	 * prepend to ours.  ed->td_list changes later.
	 */
	while (td_dma) {
		int		cc;

		td = dma_to_td (ohci, td_dma);
		if (!td) {
			ohci_err (ohci, "bad entry %8x\n", td_dma);
			break;
		}

		td->hwINFO |= cpu_to_hc32 (ohci, TD_DONE);
		cc = TD_CC_GET (hc32_to_cpup (ohci, &td->hwINFO));

		/* Non-iso endpoints can halt on error; un-halt,
		 * and dequeue any other TDs from this urb.
		 * No other TD could have caused the halt.
		 */
		if (cc != TD_CC_NOERROR
				&& (td->ed->hwHeadP & cpu_to_hc32 (ohci,
ED_H)))
			td_rev = ed_halted (ohci, td, cc, td_rev);

		td->next_dl_td = td_rev;
		td_rev = td;
		td_dma = hc32_to_cpup (ohci, &td->hwNextTD);
	}
	return td_rev;
}



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