Re: More on Lisp structures performance

> On 23 Jan 2026, at 19:42, David McClain <[email protected]> wrote:
> 
> I remember in the early days of RISC, that we could have literally hundreds of registers available in register banks or windows. These would get spilled out to stack memory en mass, one window at a time, and then reloaded as needed.

As I understand it, there are hundreds of register in an ARM processor too, but most of the time they remain in shadow. What we refer to by X0, X1, X2, etc. in assembly code are aliases that get attached to a specific selection of physical register as the instruction counter progresses. x64 also has to have more registers than is exposed by by its assembly convention, if anything, the hyperthreads need their own set of physical registers.

> When faced with so many registers it does become possible to mark out some of them for reserved uses. and so Reg vars might mean something. C.a., 1985 ??

There are some reserved registers too on modern platforms, both on ARM and x64, on ARM it is FP (frame pointer, a bookmark of where the data belonging to a specific function resides in the stack), or LR (link register, pointing to which address to go after the function completes), there are some others. They actually can be used, provided that you restore their contents on the function return but I think most people avoid using them for their own purposes unless they have to. It really just a convention by most part rather than a hardware restriction.

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